SPIRIT1 datasheet(66/94 Pages) STMICROELECTRONICS

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MCU interface

SPIRIT1

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Doc ID 022758 Rev 3

MCU interface

Communication with the MCU goes through a standard 4-wire SPI interface and 4 GPIOs.

The device is able to provide a system clock signal to the MCU.

MCU performs the following operations:

●

Program the SPIRIT1 in different operating modes by sending commands

●

Read and write buffered data, and status information from the SPI

●

Get interrupt requests from the GPIO pins

●

Apply external signals to the GPIO pins.

10.1

Serial peripheral interface

The SPIRIT1 is configured by a 4-wire SPI-compatible interface (CSn, SCLK, MOSI, and

MISO). More specifically:

●

CSn: chip select, active low

●

SCLK: bit clock

●

MOSI: data from MCU to SPIRIT1 (SPIRIT1 is the slave)

●

MISO: data from SPIRIT1 to MCU (MCU is the master).

As the MCU is the master, it always drives the CSn and SCLK. According to the active SCLK

polarity and phase, the SPIRIT1 SPI can be classified as mode 1 (CPOL=0, CPHA=0),

which means that the base value of SCLK is zero, data are read on the clock's rising edge

and data are changed on the clock's falling edge. The MISO is in tri-state mode when CSn is

high. All transfers are done most significant bit first.

The SPI can be used to perform the following operations:

●

Write data (to registers or FIFO queue)

●

Read data (from registers or FIFO queue)

●

Write commands.

When accessing the SPI interface, the two status bytes of the MC_STATE[1:0] registers are

sent to the MISO pin. The timing diagrams of the three operations above are reported below.

Figure 11.

SPI “write” operation

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