AS8650 datasheet(36/46 Pages) AMSCO

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AS8650

Datasheet - Application In form atio n

1. All values referred to VIHmin and VIlmax levels (see Table 18).

2. A fast mode I2C bus device can be used in Standard mode I2C bus system, but the requirement tSU_DAT ≥ 250ns must then be met.

This will automatically be the case if the device do not stretch the LOW period of the SCLK signal. If such a device does stretch the

LOW period of the SCLK signal, it must output the next data bit to the SDA line trmax. TSU_DAT = 1000 + 250 = 1250ns (according to

standard mode I2C bus specification) before the SCLK line released.

3. The maximum tHD;DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCLK signal.

4. Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times according toTable 18 allowed.

5. This device internally provides a hold time of at least 300ns for the SDA signal to bridge the undefined region of the falling edge of the

SCLK.

Figure 27. Definition of I2C Timing Parameters

Fall time of SDA and SCLK signals

300

20+

0.1Cb

(see Footnote 4)

300

tSU_STO

Set-up time for STOP condition

4.0

0.6

tBUF

Bus free time between a STOP and

START condition

4.7

1.3

Capacitive load for each bus line

400

VnL

Noise margin at the LOW level for each

connected device (including hysteresis)

0.1V*LDO1

VnH

Noise margin at the HIGH level for each

connected device (including hysteresis)

0.2V*LDO1

Table 19. I2C Timing Parameters

Symbol

Parameter

Standard

Fast

Units

Min

Max

Min

Max

(see Footnote 1)

tLOW

SCLK

SDA

tHIGH

tSU_DAT

tHD_STA

tSU_STA

tHD_DAT

tBUF

tSU_STO

tSP

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