Revision 0.0

KM68512B Family

CMOS SRAM

January 1998

2

Advance

64Kx8 bit Low Power CMOS Static RAM

The KM68512B family is fabricated by SAMSUNG

′s advanced

CMOS process technology. The family support various operat-

ing temperature ranges and small package type for user flexi-

bility of system design. The family also support low data

retention voltage for battery back-up operation with low data

retention current.

GENERAL DESCRIPTION

FEATURES

• Process Technology : 0.4 µm CMOS

• Organization : 64Kx8

• Power Supply Voltage : Single 5V ±10%

• Low Data Retention Voltage : 2V(Min)

• Three state output and TTL Compatible

• Package Type : 32-TSOP I -0820F

PIN DESCRIPTION

Name

Function

Address Inputs

WE

Write Enable Input

Chip Select Inputs

OE

Output Enable Input

Data Inputs/Outputs

Vcc

Power

Vss

Ground

N.C

No Connection

PRODUCT FAMILY

Product Family

Operating Temperature

Speed(ns)

Power Dissipation

PKG Type

Standby

Operating

KM68512BL-L

Commercial(0~70

°C)

5V

±0.5V

55/70

10

µA

60mA

32-TSOP1-F

KM68512BLI-L

Industrial(-40~85

°C)

70

15

µA

FUNCTIONAL BLOCK DIAGRAM

SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.

A11

A9

A8

A13

WE

CS2

A15

NC

NC

A14

A12

A7

A6

A5

A4

OE

A10

CS1

I/O8

I/O7

I/O6

I/O5

I/O4

VSS

I/O3

I/O2

I/O1

A0

A1

A2

A3

32-TSOP

Type1 - Forward

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

VCC

Precharge circuit.

Memory array

512 rows

128

×8 columns

I/O Circuit

Column select

Clk gen.

Row

select

A0

A1

A2

A3

A9

A11

A10

A4

A5

A6

A7

A8

A12

A14

I/O1

Data

cont

Data

cont

I/O8

A13

A15

CS

WE

OE

Control

logic

CS2