HD64F2149YV datasheet(139/1075 Pages) RENESAS

139 / 1075 page

Section 5 Interrupt Controller

Rev. 3.00 Jan 18, 2006 page 111 of 1044

REJ09B0280-0300

KMIMRA is an 8-bit readable/writable register that performs mask control for the keyboard

matrix interrupt inputs (pins

KIN15 to KIN8). To enable key-sense input interrupts from multiple

pin inputs in keyboard matrix scanning/sensing, clear the corresponding mask bits to 0.

KMIMRA is initialized to H'FF by a reset and in hardware standby mode.

Bits 7 to 0—Keyboard Matrix Interrupt Mask (KMIMR15 to KMIMR8): These bits control

key-sense input interrupt requests (KIN15 to KIN8).

Bits 7 to 0

KMIMR15 to

KMIMR8

Description

Key-sense input interrupt requests enabled

Key-sense input interrupt requests disabled

(Initial val

WUEMRB is an 8-bit readable/writable register that performs mask control for the wakeup event

interrupt inputs (pins

WUE7 to WUE0). A wakeup event interrupt is enabled by clearing the

corresponding mask bit to 0.

WUEMRB is initialized to H'FF by a reset and in hardware standby mode.

Bits 7 to 0—Wakeup Event Interrupt Mask (WUEMR7 to WUEMR0): These bits control

wakeup event interrupt requests (WUE7 to WUE0).

Bits 7 to 0

WUEMR7 to

WUEMR0

Description

Wakeup event interrupt requests enabled

Wakeup event interrupt requests disabled

(Initial value)

Figure 5.2 shows the relationship between interrupts IRQ7 and IRQ6, interrupts KIN15 to KIN0,

interrupts WUE7 to WUE0, and registers KMIMR, KMIMRA, and WUEMRB.

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