HD64F2149YV datasheet(957/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Appendix B Internal I/O Registers

Rev. 3.00 Jan 18, 2006 page 929 of 1044

REJ09B0280-0300

SBYCR—Standby Control Register

H'FF84

System

SSBY

R/W

STS2

R/W

STS1

R/W

STS0

R/W

—

SCK0

R/W

SCK2

R/W

SCK1

R/W

Bit

Initial value

Read/Write

—

Bus master is in high-speed mode

Medium-speed clock =

φ/2

Medium-speed clock =

φ/4

Medium-speed clock =

φ/8

Medium-speed clock =

φ/16

Medium-speed clock =

φ/32

—

System clock select 2 to 0

Standby time = 8192 states

Standby time = 16384 states

Standby time = 32768 states

Standby time = 65536 states

Standby time = 131072 states

Standby time = 262144 states

Reserved

Standby time = 16 states*

Standby timer select 2 to 0

Software standby

Transition to sleep mode after execution of SLEEP instruction in high-speed mode

or medium-speed mode

Transition to subsleep mode on execution of SLEEP instruction in subactive mode

Transition to software standby mode, subactive mode, or watch mode after execution

of SLEEP instruction in high-speed mode or medium-speed mode

Transition to watch mode or high-speed mode after execution of SLEEP instruction in

subactive mode

Note: * This setting must not be used in the flash memory version.

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