HD64F2149YV datasheet(819/1075 Pages) RENESAS

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Section 25 Electrical Characteristics

Rev. 3.00 Jan 18, 2006 page 791 of 1044

REJ09B0280-0300

25.3.4

Timing of On-Chip Supporting Modules

Tables 25.8 to 25.10 show the on-chip supporting module timing. The only on-chip supporting

modules that can operate in subclock operation (

φ = 32.768 kHz) are the I/O ports, external

interrupts (NMI and IRQ0, 1, 2, 6, and 7), the watchdog timer, and the 8-bit timer (channels 0 and

1).

Table 25.8

Timing of On-Chip Supporting Modules (1)

Condition:

CC = 2.7 V to 3.6 V, VCCB = 2.7 V to 5.5 V, VSS = 0 V, φ = 32.768 kHz

*, 2 MHz to

maximum operating frequency, T

a = –20 to +75°C

Condition

10 MHz

Item

Symbol

Min

Max

Unit

Test Conditions

I/O ports

Output data delay time

PWD

—

100

Figure 25.14

Input data setup time

PRS

—

Input data hold time

PRH

—

FRT

Timer output delay time

FTOD

—

100

Figure 25.15

Timer input setup time

FTIS

—

Timer clock input setup time

FTCS

—

Figure 25.16

Single edge

FTCWH

1.5

—

cyc

Timer clock

pulse width

Both edges

FTCWL

2.5

—

TMR

Timer output delay time

TMOD

—

100

Figure 25.17

Timer reset input setup time

TMRS

—

Figure 25.19

Timer clock input setup time

TMCS

—

Figure 25.18

Single edge

TMCWH

1.5

—

cyc

Timer clock

pulse width

Both edges

TMCWL

2.5

—

PWM,

PWMX

Pulse output delay time

PWOD

—

100

Figure 25.20

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