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HD64F2149YV Folha de dados(PDF) 712 Page - Renesas Technology Corp

Nome de Peças HD64F2149YV
Descrição Electrónicos  Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series
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Fabricante Electrônico  RENESAS [Renesas Technology Corp]
Página de início  http://www.renesas.com
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HD64F2149YV Folha de dados(HTML) 712 Page - Renesas Technology Corp

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Section 21 RAM
Rev. 3.00 Jan 18, 2006 page 684 of 1044
REJ09B0280-0300
21.1.2
Register Configuration
The on-chip RAM is controlled by SYSCR. Table 21.1 shows the register configuration.
Table 21.1
Register Configuration
Name
Abbreviation
R/W
Initial Value
Address*
System control register
SYSCR
R/W
H'09
H'FFC4
Note:
*
Lower 16 bits of the address.
21.2
System Control Register (SYSCR)
7
CS2E
0
R/W
6
IOSE
0
R/W
5
INTM1
0
R
4
INTM0
0
R/W
3
XRST
1
R
0
RAME
1
R/W
2
NMIEG
0
R/W
1
HIE
0
R/W
Bit
Initial value
Read/Write
The on-chip RAM is enabled or disabled by the RAME bit in SYSCR. For details of other bits in
SYSCR, see section 3.2.2, System Control Register (SYSCR).
Bit 0—RAM Enable (RAME): Enables or disables the on-chip RAM. The RAME bit is
initialized when the reset state is released. It is not initialized in software standby mode.
Bit 0
RAME
Description
0
On-chip RAM is disabled
1
On-chip RAM is enabled
(Initial value)



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