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HD64F2149YV Folha de dados(PDF) 711 Page - Renesas Technology Corp |
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HD64F2149YV Folha de dados(HTML) 711 Page - Renesas Technology Corp |
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711 / 1075 page ![]() Section 21 RAM Rev. 3.00 Jan 18, 2006 page 683 of 1044 REJ09B0280-0300 Section 21 RAM 21.1 Overview The H8S/2169 or H8S/2149 has 2 kbytes of on-chip high-speed static RAM. The on-chip RAM is connected to the bus master by a 16-bit data bus, enabling both byte data and word data to be accessed in one state. This makes it possible to perform fast word data transfer. The on-chip RAM can be enabled or disabled by means of the RAM enable bit (RAME) in the system control register (SYSCR). 21.1.1 Block Diagram Figure 21.1 shows a block diagram of the on-chip RAM. Internal data bus (upper 8 bits) Internal data bus (lower 8 bits) H'FFE880 H'FFE882 H'FFE884 H'FFEFFE H'FFE881 H'FFE883 H'FFE885 H'FFEFFF H'FFFF00 H'FFFF7E H'FFFF01 H'FFFF7F Figure 21.1 Block Diagram of RAM |
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