HD64F2149YV datasheet(587/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

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Fabricante Electrônico	RENESAS [Renesas Technology Corp]

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Section 17 Keyboard Buffer Controller

Rev. 3.00 Jan 18, 2006 page 559 of 1044

REJ09B0280-0300

Section 17 Keyboard Buffer Controller

17.1

Overview

The H8S/2169 or H8S/2149 has three on-chip keyboard buffer controller channels, designated 0 to

2. The keyboard buffer controller is provided with functions conforming to the PS/2 interface

specifications.

Data transfer using the keyboard buffer controller employs a data line (KD) and a clock line,

providing economical use of connectors, board surface area, etc. Figure 17.1 shows how the

keyboard buffer controller is connected.

17.1.1

Features

• Conforms to PS/2 interface specifications

• Direct bus drive (via the KCLK and KD pins)

• Interrupt sources: on completion of data reception and on detection of clock edge

• Error detection: parity error and stop bit monitoring

Vcc

KCLK in

KCLK out

KD in

KD out

Keyboard buffer controller

(H8S/2169 or H8S/2149 chip)

System side

KCLK in

KCLK out

KD in

KD out

I/F

Keyboard side

Vcc

Clock

Data

Figure 17.1 Keyboard Buffer Controller Connection

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