HD64F2149YV datasheet(394/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Section 12 8-Bit Timers

Rev. 3.00 Jan 18, 2006 page 366 of 1044

REJ09B0280-0300

12.3

Operation

12.3.1

TCNT Incrementation Timing

TCNT is incremented by input clock pulses (either internal or external).

Internal Clock: An internal clock created by dividing the system clock (

φ) can be selected by

setting bits CKS2 to CKS0 in TCR. Figure 12.2 shows the count timing.

Internal clock

TCNT input

clock

TCNT

N – 1

N + 1

Figure 12.2 Count Timing for Internal Clock Input

External Clock: Three incrementation methods can be selected by setting bits CKS2 to CKS0 in

TCR: at the rising edge, the falling edge, and both rising and falling edges.

Note that the external clock pulse width must be at least 1.5 states for incrementation at a single

edge, and at least 2.5 states for incrementation at both edges. The counter will not increment

correctly if the pulse width is less than these values.

Figure 12.3 shows the timing of incrementation at both edges of an external clock signal.

HD64F2149YV Folha de dados(PDF) 394 Page - Renesas Technology Corp