1

dc2365af

DEMO MANUAL DC2365A

Description

LTC2358/LTC2357/

LTC2353/LTC2333:

16-/18-Bit, Octal, Quad and Dual

200ksps/400ksps/600ksps/1Msps SAR ADCs

Demonstration circuit 2365A highlights the LTC®2358

family of buffered input ADCs. The LTC2358/LTC2357/

LTC2353/LTC2333 are low noise, high speed, 16-/18-

bit successive approximation register (SAR) ADCs with

integrated front end buffers. These ADCs accept a wide

common mode range. Pico-amp inputs and high CMRR

enable these ADCs to connect directly to a wide range of

sensors without compromising measurement accuracy.

The following text refers to the LTC2358-18 but applies

to all parts in the family, the only differences being the

number of bits, number of channels and the maximum

sample rate. The LTC2358-18 has a flexible SoftSpan™

interface that allows conversion-by-conversion control of

the input voltage span on a per-channel basis. An internal

2.048V reference and 2X buffer simplify basic operation

while an external reference can be used to increase the

input range and the SNR of the ADC.

TheDC2365AdemonstratestheDCandACperformanceof

theLTC2358-18inconjunctionwiththeDC590/DC2026and

DC890 data collection boards. Use the DC590/DC2026 to

demonstrate DC performance such as peak-to-peak noise

and DC linearity. Use the DC890 if precise sampling rates

are required or to demonstrate AC performance such as

SNR, THD, SINAD and SFDR. The DC2365A is intended

to demonstrate recommended grounding, component

placement and selection, routing and bypassing for this

ADC. A simple driver circuit for the analog inputs is also

presented.

Design files for this circuit board including schematics,

BOM and layout are available at http://www.linear.com/

demo/DC2365A

L

, LT, LTC, LTM, Linear Technology, Linduino and the Linear logo are registered trademarks

and SoftSpan, PScope and QuikEval are trademarks of of Linear Technology Corporation. All

other trademarks are the property of their respective owners.