7

dc2365af

DEMO MANUAL DC2365A

Dc2365a setup

Performance Characteristics section of the LTC2358-18

data sheet. This involves using a 60MHz clock source

along with a sinusoidal generator at a frequency of ap-

proximately 2kHz. The input signal level is approximately

–1dBFS.AtypicalFFTobtainedwiththeDC2365Aisshown

in Figure 2. Note that to calculate the real SNR, the signal

level (F1 amplitude = –1.023dB) has to be added back to

the SNR that PScope displays. With the example shown in

Figure 2, this means that the actual SNR would be 96.76dB

instead of the 95.74dB that PScope displays. Taking the

RMS sum of the recalculated SNR and the THD yields

a SINAD of 96.58dB which is fairly close to the typical

number for this ADC.

To change the default settings for the LTC2358-18 in

PScope, click on the Set Demo Bd Options button in the

PScope tool bar shown in Figure 6. This will open the

Configure Channels menu of Figure 7. In this menu it is

possible to set the input SoftSpan range setting for each

channel. There is also a button to return PScope to the

default DC2365A settings which are optimized for the

default hardware settings of the DC2365A.

Thereareanumberofscenariosthatcanproducemislead-

ing results when evaluating an ADC. One that is common

is feeding the converter with an input frequency, that is

a sub-multiple of the sample rate, and which will only

exercises a small subset of the possible output codes.

The proper method is to pick an M/N frequency for the

input sine wave frequency. N is the number of samples

in the FFT. M is a prime number between one and N/2.

Multiply M/N by the sample rate to obtain the input sine

wave frequency. Another scenario that can yield poor

results is if you do not have a signal generator capable of

ppm frequency accuracy or if it cannot be locked to the

clock frequency. You can use an FFT with windowing to

reduce the “leakage” or spreading of the fundamental to

get a close approximation of the ADC performance. If an

amplifier or clock source with poor phase noise is used,

the windowing will not improve the SNR.

Figure 5. ±10.24V Pseudo-Differential DC Coupled Driver

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