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TMS320DM647 Folha de dados(PDF) 6 Page - Texas Instruments |
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TMS320DM647 Folha de dados(HTML) 6 Page - Texas Instruments |
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6 / 182 page ![]() Revision History TMS320DM647/TMS320DM648 Digital Media Processor SPRS372B – MAY 2007 – REVISED APRIL 2008 www.ti.com NOTE: Page numbers for previous revisions may differ from page numbers in the current version. The table lists the technical changes made for this revision. Page numbers may differ from previous versions. Changes Made in Revision B LOCATION ADDITIONS, DELETIONS, MODIFICATIONS Global Many signal names changed throughout the document Many changes were made in this revision. While every effort was made to document the changes, some Global may have been inadvertently overlooked. It is advisable to read the entire data manual and not depend on this list of changes. Section 1.1 Advanced Event Triggering was added to the features list Table 2-1 Modified the hardware charecteristics tabe Table 2-2 Changed some address ranges in the C64x+ Cache Registers table Table 2-3 Modified the memory map summary table Section 2.5 Modified the pin map figures and tables with revised signal names Figure 2-6 Modified the device nomenclature figure Table 3-1 Modified the system module register memory map table Section 3.2.1 Modified the Boot Config Register Table 3-3 Modified boot modes table Table 3-7 Modified the Pin Mux Register Section 4.2 Modified the Data Switch Fabric Connections section Section 5 Modified the Device Operating Conditions Table 6-5 Modified the Clock Domain Assignment Table and added a footnote to the table Section 6.4 Modified the PLL1 Controller section Section 6.5 Modified the PLL2 Controller section Section 6.7 Modified the Reset Controller Register section Section 6.9.3 Replaced the section on DDR2 Interface Section 6.10 Modified the EMIFA section Section 6.12.2 Modified the VIC Peripheral Register Descriptions section Section 6.14 Added the SPI section Section 6.15 Modified the I2C section Section 6.19 Modified the Ethernet Subsystem section Table 6-91 Modified the Timing Requirements for VCLK for VLYNQ table Section 6.23 Modified the GPIO section Section 6.24 Added Advanced Event Triggering and Trace in the Emulation Features and Capability section Table 6-98 Modified the JTAGID Register table Revision History 6 Submit Documentation Feedback |
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