MS85RS1MTY datasheet(9/43 Pages) RAMXEED

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MS85RS1MTY(AEC-Q100 Compliant)

DS501-00096-1v0-E



READ

The READ command reads FeRAM memory cell array data. Arbitrary 24 bits address and op-code of READ

are input to SI. The 7-bit upper address is invalid.Then, 8-cycle clock is input to SCK. SO is output synchro-

nously to the falling edge of SCK. While reading, the SI value is invalid. When CS is risen, the READ command

is completed, but keeps on reading with automatic address increment which is enabled by continuously

sending clocks to SCK in unit of 8 cycles before CS rising. When it reaches the most significant address, it

rolls over to the starting address, and reading cycle keeps on infinitely.



WRITE

The WRITE command writes data to FeRAM memory cell array. WRITE op-code, arbitrary 24 bits of address

and 8 bits of writing data are input to SI. The 7-bit upper address is invalid.When 8 bits of writing data is

input, data is written to FeRAM memory cell array. Risen CS will terminate the WRITE command, but if you

continue sending the writing data for 8 bits each before CS rising, it is possible to continue writing with

automatic address increment. When it reaches the most significant address, it rolls over to the starting

address, and writing cycle can be continued infinitely.



FSTRD

The FSTRD command reads FeRAM memory cell array data.Arbitrary 24bits address and op-code of FSTRD

are input to SI followed by 8 bits dummy. The 7-bit upper address is invalid.Then, 8-cycle clock is input to

SCK. SO is output synchronously to the falling edge of SCK. While reading, the SI value is invalid. When

CS is risen, the FSTRD command is completed, but keeps on reading with automatic address increment

which is enabled by continuously sending clocks to SCK in unit of 8 cycles before CS rising. When it reaches

the most significant address, it rolls over to the starting address, and reading cycle keeps on infinitely.

SCK

MSB

Data Out

MSB

High-Z

LSB

420

Invalid

LSB

X16

14 15

OP-CODE

24-bit Address

SCK

MSB

Data In

MSB

High-Z

LSB

420

LSB

X16

14 15

OP-CODE

SCK

Invalid

MSB

LSB

MSB

Data Out

LSB

High-Z

Invalid

0123

29 30

6 7 8 9 10 11 12 13 1415

46 47

31 32

38 39 40 41 42 43 44 45

00001011

210 X

543

XX 16

OP-CODE

24-bit Address

8-bit Dummy

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