PM7347 datasheet(131/341 Pages) PMC

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S/UNI®-JET Data Sheet

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Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

131

Document ID: PMC-1990267, Issue 3

EXZSO

The EXZSO bit enables only summed zero occurrences to be accumulated in the PMON

EXZS Count Registers. When EXZSO is set to logic one, any excessive zeros occurrences

over an 85 bit period increments the PMON EXZS counter by one. When EXZSO is set to

logic zero, summed LCVs are accumulated in the PMON EXZS Count Registers. A summed

LCV is defined as the occurrence of either BPVs not part of a valid B3ZS signature or three

consecutive zeros (or excessive zeros if EXZDET=1) occurring over an 85 bit period; each

summed LCV occurrence increment the PMON EXZS counter by one. Refer to Table 14.

BPVO

The BPVO bit enables only bipolar violations to indicate LCV and be accumulated in the

PMON LCV Count Registers. When BPVO is set to logic one, only BPVs not part of a valid

B3ZS signature generate an LCV indication and increment the PMON LCV counter. When

BPVO is set to logic zero, both BPVs not part of a valid B3ZS signature, and either three

consecutive zeros or excessive zeros generate an LCV indication and increment the PMON

LCV counter. Refer to Table 14.

Table 14 DS3 FRMR EXZS/LCV Count Configurations

Counter Function

EXZSO

BPVO

EXZDET

PMON EXZ Count

PMON LCV Count

Summed LCVs

BPVs & every 3 consecutive zeros

Summed LCVs

BPVs & every string of more than

3 consecutive zeros

Reserved

Summed excessive

zeros

BPVs & every 3 consecutive zeros

Summed excessive

zeros

BPVs & every string of 3+

consecutive zeros

Summed excessive

zeros

Only BPVs

Summed excessive

zeros

Only BPVs

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