PM7347 datasheet(59/341 Pages) PMC

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S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

Document ID: PMC-1990267, Issue 3

The J2-FRMR frames to a J2 signal with an average reframe time of 5.07 ms. An alternate

framing algorithm that uses the CRC-5 check to detect static mimic patterns is also available.

Once in frame, the J2-FRMR provides indications of frame and multiframe boundaries, and

marks overhead bits, x-bits, m-bits, and reserved channels (TS97 and TS98). Indications of LOS,

bipolar violations, excessive zeroes, change of frame alignment, framing errors, and CRC errors

are provided, and may be accumulated by the PMON (with the exception of change of frame

alignment). Maskable interrupts are available to alert the microprocessor to the occurrence of any

of these events. In addition to marking x-bit values, J2-FRMR provides microprocessor access to

the x-bits, and will optionally generate an interrupt when any of the x-bits change state. The m-

bits and the associated clock are can either be extracted through the RDLC or through the

ROH[x] and ROHCLK[x] output pins of the S/UNI-JET . The m-bits are also presented to the

RBOC for detection of any generic bit-oriented codes.

The J2-FRMR detects status signals such as Physical AIS, Payload AIS, RAI in m-bits, and

Remote LOF (a-bit). It also optionally generates an interrupt when any of these status signals

change.

J2 LOS is declared when no marks have been received for one of 15, 31, 63, or 255 consecutive

bit periods. J2 LOS is cleared when either 15, 31, 63, or 255 consecutive bit periods have passed

without detection of excessive zeros (meaning eight or more consecutive zeros) as required by

ITU-T G.775.

J2 LOF is declared when seven or more consecutive multiframes with errored framing patterns

are received. The J2 LOF is cleared when three or more consecutive multiframes with correct

framing patterns are received. Also available are framing algorithms that take into account the

CRC calculation. These framing algorithms are described in the following section.

J2 Physical Layer AIS is declared when two or less zeros are detected in a sequence of 3156 bits.

It is cleared when three or more zeros is detected in a sequence of 3156 bits as required by ITU-T

G.775.

J2 Payload AIS is detected when the incoming J2 payload has two or less zeros in a sequence of

3072 bits. It is cleared when three or more zeros are detected in a sequence of 3072 bits.

Note: The J2-FRMR may be forced to re-frame by microprocessor control. Similarly, the

microprocessor may disable the J2-FRMR from reframing due to framing bit errors.

You can configure the J2-FRMR and mask or acknowledge all sources of interrupts through the

internal registers. These internal registers are accessed from a generic microprocessor bus.

10.3.1

J2 Frame Find Algorithms

The J2-FRMR searches for frame alignment using one of two algorithms, as selected by the

CRC_REFR bit in the J2-FRMR Configuration Register.

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