PM7347 datasheet(316/341 Pages) PMC

316 / 341 page

S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

316

Document ID: PMC-1990267, Issue 3

Figure 71 Framer Mode J2 Receive Output Stream

RDATO

RFPO/RMFPO

TS968

ROVRHD

TS11

TS978

TS977

TS976

TS977

TS978

RSCLK

TS973

TS972

TS971

Figure 72 Framer Mode J2 Receive Output Stream with RGAPCLK

RGAPCLK

RDATO

TS96 8

TS11

TS96 8

TS96 7

TS96 6

TS90 6

TS90 7

TS90 8

TS96 8

The Framer Mode J2 Receive Output Stream diagrams (Figure 71 and Figure 72) show the format

of the outputs RDATO, RFPO/RMFPO, RSCLK (and RGAPCLK), and ROVRHD when the

FRMRONLY bit in the S/UNI-JET Configuration 1 Register is set. Figure 71 shows the data

streams when the S/UNI-JET is configured for the J2 receive format. If the RXMFPO register bit

is a logic zero, RFPO is valid and will pulse high for one RSCLK cycle once each J2 frame with

alignment to the first frame alignment bit on the RDATO data stream (as shown in Figure 71). If

the RXMFPO register bit is a logic one, RMFPO is valid and will pulse high once each J2 multi-

frame aligned to the first frame alignment bit on the RDATO data output stream. ROVRHD will

be high for every overhead bit position on the RDATO data stream. The RGAPCLK output is

available in place of RSCLK when the RXGAPEN bit in the S/UNI-JET Configuration 2 Register

is set to logic one. RGAPCLK remains high during the overhead bit positions as shown in Figure

72.

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