CC1010-RTR1 datasheet(103/152 Pages) TI

103 / 152 page

CC1010

SWRS047

Page 103 of 152

The hardware support for preamble

detection consists of a seven-bit counter,

which keeps track of the number of

successive alternating bits. It is reset

whenever

two

bits

are

equal

and

incremented whenever two successive bits

are different. The counter is limited and

will not overflow. A seven-bit threshold is

programmable through PDET.PLEN. Not

until this counter equals or exceeds

PDET.PLEN will a synchronization byte be

accepted.

CC1010 is able to detect

preambles (including the synchronization

byte) with minimum lengths from 10 to 135

bits.

When the requisite number of alternating

zeros and ones has been received, a

special state is entered where a deviation

from the 0-1-pattern is searched for. Once

a bit does not correspond to the

alternating bits pattern, a synchronization

byte matching that defined in BSYNC must

occur within a maximum of seven bits,

otherwise the receiver will reset its

preamble counter and go back to the

preamble detection mode.

If, however, a match is found before the

timeout, the synchronization byte is

transferred to RFBUF and an EXIF.RFIF

interrupt request generated, after which

the receiver enters normal reception

mode. For both the examples shown in

Figure 29, BSYNC should be set to

10100101 (0xA5).

PDET.PEN is not cleared by hardware

when the preamble is detected, but it will

not affect the reception of data. It can be

cleared or left set, decided by what is

more practical for the software developer.

However,

before

new

preamble

detection session is initiated, PDET.PEN

must be cleared.

manual

average

filter

locking

performed, the average filter should be

locked after receiving the synchronization

byte in NRZ mode. (See the Reception

section on page 96 for details.) As

mentioned above it is vital that the

synchronization byte is DC-balanced and

contains no more than two consecutive

ones or zeros in order to achieve a good

average filter lock in this case.

17.10.1 Estimating the required

preamble length

The preamble length is determined by

several factors. First, the receiver circuitry

needs some time to settle. Second, the

averaging filter must acquire a correct

value. Third, the preamble detection circuit

must receive the required number of bits.

The first factor depends on the data rate

and will be limited to only a few bits. The

number of bits required by the averaging

filter is a bit tricky to calculate, but

estimates of the maximum bound are

given in Table 31 and Table 32. The

number of bits required will vary because

the updating of the averaging filter is not

synchronised

the

start

the

transmission. RF noise can complicate the

issue further.

To determine an approximate preamble

length, add the estimated number of bits

required by the averaging filter with the

preamble detector setting. Round the

number of bits up to the closest multiple of

8 and use this as a starting point. For time-

critical applications where it is important to

use as short preamble as possible, the

preamble length should be optimized by

experimentation.

17.10.2 Manchester violations

In some RF-applications using Manchester

coding, violations of the Manchester

coding have been used for start- and end-

of-frame delimiters. Furthermore some

implementations use a sequence of all

ones or all zeros for a preamble instead of

alternating

zero-one

sequence.

Although an all zero or all one sequence

will

certainly

DC-balanced

once

Manchester coded, the receiver is unable

to decide whether it is receiving an all zero

or an all one sequence, since only the bit

synchronization will separate these.

In order to facilitate reception and

transmission of such special cases,

support has been implemented in

CC1010

for allowing the data format to be changed

the

middle

reception

transmission. Furthermore, violations of

the Manchester coding format is reported

in the status bit RFCON.MVIOL. The

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