CC1010-RTR1 datasheet(67/152 Pages) TI

67 / 152 page

CC1010

SWRS047

Page 67 of 152

SBUF0 (0x99) - Serial Port 0, data buffer

Bit

Name

R/W

Reset value

Description

7:0

SBUF0(7:0) R/W 0x00

Serial Port 0, data buffer.

SBUF1 (0xC1) – Serial Port 1, data buffer

Bit

Name

R/W

Reset value

Description

7:0

SBUF1(7:0) R/W 0x00

Serial Port 1, data buffer

SCON0 (0x98) - Serial Port 0 Control Register

Bit

Name

R/W

Reset value

Description

SM0_0

R/W

SM1_0

R/W

Serial Port 0 mode bits, decoded as:

SM0_0 SM1_0 Mode

0 (Synchronous half duplex)

1 (Asynchronous full duplex, start + stop bit)

2 (Asynchronous full duplex, start + stop bit,

9th data bit)

3 (Asynchronous full duplex, start + stop bit,

9th data bit)

SM2_0

R/W

Multiprocessor communication enable. In modes 2 and 3

SM2_0 = 1 enables the multiprocessor communication feature:

In mode 2 or 3

RI_0 will not be activated if the received 9th bit

is 0. If

SM2_0 = 1 in mode 1, RI_0 will only be activated if a

valid stop bit is received. In mode 0

SM2_0 establishes the

baud rate: when

SM2_0 = 0 the baud rate is clk / 12; when

SM2_0 = 1 the baud rate is clk / 4.

REN_0

R/W

Receive enable. When

REN_0 = 1 reception is enabled.

TB8_0

R/W

Defines the state of the 9th data bit transmitted in modes 2 and

RB8_0

R/W

In modes 2 and 3

RB8_0 indicates the state of the 9th bit

received. In mode 1

RB8_0 indicates the state of the received

stop bit. In mode 0

RB8_0 is not used.

TI_0

R/W

Transmit interrupt flag. Indicates that the transmit data word

has been shifted out. In mode 0

TI_0 is set at the end of the

8th data bit. In all other modes

TI_0 is set when the stop bit is

placed on the

TXD0 pin. TI_0 must be cleared by the

software.

RI_0

R/W

Receive interrupt flag. Indicates that a serial data word has

been received. In mode 0

RI_0 is set at the end of the 8th

data bit. In mode 1

RI_0 is set after the last sample of the

incoming stop bit, subject to the state of

SM2_0. In modes 2

and 3

RI_0 is set at the end of the last sample of RB8_0.

RI_0 must be cleared by the software.

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