CC1010-RTR1 datasheet(54/152 Pages) TI

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CC1010

SWRS047

Page 54 of 152

TCON (0x88) - Timer / Counter 0 and 1 control register

Bit

Name

R/W

Reset value

Description

TF1

R/W

Timer 1 overflow flag.

TF1 is set to 1 by hardware when the

Timer 1 count overflows and is cleared by hardware when the

8051 vectors to the interrupt service routine.

TR1

R/W

Timer 1 run control bit

0 : Timer / Counter 1 is disabled

1 : Timer / Counter 1 is enabled

TF0

R/W

Timer 0 overflow flag.

TF0 is set to 1 by hardware when the

Timer 0 count overflows and is cleared by hardware when the

8051 vectors to the interrupt service routine.

TR0

R/W

Timer 0 run control bit

0 : Timer / Counter 0 is disabled

1 : Timer / Counter 0 is enabled

IE1

R/W0

External interrupt 1 edge detect (interrupt flag)

If external interrupt 1 is configured to be edge sensitive

(

TCON.IT1 = 1), IE1 is set by hardware when a negative

edge is detected on the

INT1 pin and is cleared by hardware

when the 8051 vectors to the corresponding interrupt service

routine. In edge-sensitive mode,

IE1 can also be set by

software.

If external interrupt 1 is configured to be level-sensitive

(

TCON.IT1 = 0), IE1 is set when the INT1 pin is low and

cleared when the

INT1 pin is high. In level-sensitive mode,

software cannot write to

IE1.

IT1

R/W

External interrupt 1 type select.

0 : The

INT1 interrupt is triggered when INT1 is low (level

sensitive).

1 : The

INT1 interrupt is triggered on the falling edge (edge

sensitive)

IE0

R/W0

External interrupt 0 edge detect (interrupt flag)

If external interrupt 0 is configured to be edge sensitive

(

TCON.IT0 = 1), IE0 is set by hardware when a negative

edge is detected on the

INT0 pin and is cleared by hardware

when the 8051 vectors to the corresponding interrupt service

routine. In edge-sensitive mode,

IE0 can also be set by

software.

If external interrupt 0 is configured to be level-sensitive

(

TCON.IT0 = 0), IE0 is set when the INT0 pin is low and

cleared when the

INT0 pin is high. In level-sensitive mode,

software cannot write to

IE0.

IT0

R/W

External interrupt 0 type select.

0 : The

INT0 interrupt is triggered when INT0 is low (level

sensitive).

1 : The

INT0 interrupt is triggered on the falling edge (edge

sensitive)

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