VL6524 datasheet(38/70 Pages) STMICROELECTRONICS

Nome de Peças	VL6524

Descrição Electrónicos	VGA single-chip camera module

PDF	70 Pages

Scroll/Zoom	100%

Fabricante Electrônico	STMICROELECTRONICS [STMicroelectronics]

Página de início	http://www.st.com

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38 / 70 page

Host communication - I²C control interface

VL6524/VS6524

38/70

Current location, single data read

For the master reading from the slave the R/W bit is set to one. The register index of the

data returned is that accessed by the previous read or write message.

The first data byte returned by a read message is the contents of the internal index value

and NOT the index value. This was the case in older V2W implementations.

Note that the read message is terminated with a negative acknowledge (A) from the master:

it is not guaranteed that the master will be able to issue a stop condition at any other time

during a read message. This is because if the data sent by the slave is all zeros, the SDA

line cannot rise, which is part of the stop condition.

Figure 26.

Current location, single read

DATA

DATA[7:0]

DEV ADDR R/W A

‘1’ (Read)

16-bit index, 8-bit data current location, single data read

From Master to Slave

From Slave to Master

S = START Condition

Sr = repeated START

P = STOP Condition

A = Acknowledge

A = Negative Acknowledge

Previous Index Value, K

VL6524 Folha de dados(PDF) 38 Page - STMicroelectronics