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LTC4260IGN Folha de dados(PDF) 13 Page - Linear Technology |
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LTC4260IGN Folha de dados(HTML) 13 Page - Linear Technology |
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13 / 28 page ![]() LTC4260 13 4260f APPLICATIO S I FOR ATIO undervoltage autoretry has been disabled by clearing bit A1. When power is applied to the device, if UV is below its 3.12V threshold after INTVCC crosses its 4.5V undervolt- age lockout threshold, an undervoltage fault will be logged in the fault register. Board Present Change of State Whenever the BD_PRST pin toggles, bit D4 is set to indicate a change of state. When the BD_PRST pin goes high, indicating board removal, the switch turns off imme- diately (with a 1mA current from GATE to ground) and clears the board present bit, C4. If the BD_PRST pin is pulled low, indicating a board insertion, all fault bits except D4 will be cleared and the board present bit, C4, is set. If the BD_PRST pin remains low for 100ms the state of the ON pin will be captured in the FET On Control bit A3. This turns the switch on if the ON pin is tied high. There is an internal 10µA pull-up current source on the BD_PRST pin. If the system shuts down due to a fault, it may be desirable to restart the system simply by removing and reinserting a load card. In cases where the LTC4260 and the switch reside on a backplane or midplane and the load resides on a plug-in card, the BD_PRST pin can be used to detect when the plug-in card is removed (see Figure 4). Once the plug-in card is reinserted the fault register is cleared (except for D4). After 100ms the state of the ON pin is latched into bit A3 of the control register. At this point the system will start up again. If a connection sense on the plug-in card is driving the BD_PRST pin, the insertion or removal of the card may cause the pin voltage to bounce. This will result in clearing the fault register when the card is removed. The pin can be debounced using a filter capacitor, CBD_PRST, on the BD_PRST pin as shown in Figure 4. The filter time is given by: tFILTER = CBD_PRST • 123 [ms/µF] FET Short Fault A FET short fault will be reported if the data converter measures a current sense voltage greater than or equal to 2mV while the FET is turned off. This condition sets the FET short present bit, C5, and the FET short fault bit D5. Figure 3. Short-Circuit Waveforms VOUT 50V/DIV IOUT 5A/DIV ∆VGATE 10V/DIV TIMER 2V/DIV 100µs/DIV 4260 F03 During a short circuit, if the current limit sense voltage exceeds 150mV, the active current limit enters a high current protection mode that immediately turns off the output transistor by pulling the GATE-to-SOURCE voltage to zero. Current in the output transistor drops from tens of amps to zero in a few hundred nanoseconds. The input voltage will drop during the high current and then spike upwards due to parasitic inductances when the FET shuts off (see Supply Transients). Following this event, the part may turn on again after a delay (typically the 100ms normal turn-on delay if the input voltage drops below the UVLO threshold) and enters active current limit before shutting off. Overvoltage Fault An overvoltage fault occurs when the OV pin rises above its 3.5V threshold. This shuts off the switch immediately (with a 1mA current from GATE to ground) and sets the overvoltage present bit, C0, and the overvoltage fault bit D0. If the OV pin subsequently falls back below the threshold for 100ms, the switch will be allowed to turn on again unless the overvoltage autoretry has been disabled by clearing bit A0. Undervoltage Fault An undervoltage fault occurs when the UV pin falls below its 3.12V threshold. This turns off the switch immediately (with a 1mA current from GATE to ground) and sets the undervoltage present bit, C1, and the undervoltage fault bit D1. If the UV pin subsequently rises above the threshold for 100ms, the switch will turn on again unless the |
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