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LTC4260IGN Folha de dados(PDF) 8 Page - Linear Technology

Nome de Peças LTC4260IGN
Descrição Electrónicos  Positive High Voltage Hot Swap Controller with I2C Compatible Monitoring
PDF  28 Pages
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Fabricante Electrônico  LINER [Linear Technology]
Página de início  http://www.linear.com
Logo LINER - Linear Technology

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LTC4260
8
4260f
GPIO: General Purpose Input/Output. Open-drain logic
output and logic input. Defaults to pull low to indicate
power is bad. Configure according to Table 3.
NC: No Connect. Unconnected pins. These pins provide
extra distance between high and low voltage pins.
ON: On Control Input. A rising edge turns on the external
N-channel FET and a falling edge turns it off. This pin is
also used to configure the state of the FET ON bit (and
hence the external FET) at power up. For example if the ON
pin is tied high, then the FET ON control bit (A3) will go high
100ms after power-up. Likewise if the ON pin is tied low
then the part will remain off after power-up until the FET
ON control bit is set high using the I2C bus. A high-to-low
transition on this pin will clear faults.
OV (GN/UH Packages): Overvoltage Comparator Input.
Connect this pin to an external resistive divider from VDD.
If the voltage at this pin rises above 3.5V, an overvoltage
fault is detected and the switch turns off. Tie to GND if
unused.
SCL: Serial Bus Clock Input. Data at the SDA pin is shifted
in or out on rising edges of SCL. This is a high impedance
pin that is generally driven by an open-collector output
from a master controller. An external pull-up resistor or
current source is required.
SDAI: Serial Bus Data Input. A high impedance input used
for shifting in address, command or data bits. Normally
tied to SDAO to form the SDA line.
SDAO: Serial Bus Data Output. Open-drain output used for
sending data back to the master controller or acknowledg-
ing a write operation. Normally tied to SDAI to form the
SDA line. An external pull-up resistor or current source is
required.
SENSE: Current Sense Input. Connect this pin to the
output of the current sense resistor. The current limit
circuit controls the GATE pin to limit the sense voltage
between the VDD and SENSE pins to 50mV or less depend-
ing on the voltage at the FB pin. This pin is used as an input
to the 8-bit ADC.
SOURCE: N-Channel MOSFET Source Connection and
ADC Input. Connect this pin to the source of the external
N-channel MOSFET switch. This pin also serves as the
ADC input to monitor output voltage. The pin provides a
return for the gate pull-down circuit and as a supply for the
charge pump circuit.
TIMER: Timer Input. Connect a capacitor between this
pin and ground to set a 12ms/µF duration for current limit
before the switch is turned off. The duration of the off
time is 518ms/µF when autoretry during current limit is
enabled. A minimum value of 0.1nF must be connected
to this pin.
UV: Undervoltage Comparator Input. Connect this pin to
an external resistive divider from VDD. If the voltage at this
pin falls below 3.12V, an undervoltage fault is detected and
the switch turns off. Pulling this pin below 1.2V resets all
faults and allows the switch to turn back on. Tie to INTVCC
if unused.
VDD: Supply Voltage and Current Sense Input. This pin has
an undervoltage lockout threshold of 7.45V.
INTVCC: Internal Low Voltage Supply Decoupling Output.
Connect a 0.1µF capacitor from this pin to ground. This pin
can be used to drive the other pins to logic high and has an
undervoltage lockout threshold of 3.8V.
VDDK (UH Package): Same as VDD. Connect this pin to
VDD. VDDK tied to VDD internally with 18Ω.
PI FU CTIO S



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