VSC8540RT datasheet(62/87 Pages) MICROCHIP

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VSC8540RT

DS60001603E-page 62

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6.6.4

EEE WAKE ERROR COUNTER

This register is used by PHY types that support EEE to count wake time faults where the PHY fails to complete its normal

wake sequence within the time required for the specific PHY type. The definition of the fault event to be counted is

defined for each PHY and can occur during a refresh or a wakeup as defined by the PHY. This 16-bit counter is reset to

all zeros when the EEE wake error counter is read or when the PHY undergoes hardware or software reset.

6.6.5

EEE ADVERTISEMENT

This register defines the EEE advertisement that is sent in the unformatted next page following a EEE technology mes-

sage code. The following table shows the bit assignments for the EEE advertisement register.

6.6.6

EEE LINK PARTNER ADVERTISEMENT

All the bits in the EEE LP advertisement register are read only. A write to the EEE LP advertisement register has no

effect. When the AN process has been completed, this register will reflect the contents of the link partner's EEE adver-

tisement register. The following table shows the bit assignments for the EEE advertisement register.

6.6.7

802.3BF REGISTERS

The following table shows the bit assignments for the 802.3bf registers. When the link is down, 0 is the value returned.

1.1801 would be device address of 1 and register address of 1801.

TABLE 6-58:

EEE WAKE ERROR COUNTER, ADDRESS 3.22

Bit

Name

Access

Description

15:0 Wake error counter RO

Count of wake time faults for a PHY

TABLE 6-59:

EEE ADVERTISEMENT, ADDRESS 7.60

Bit

Name

Access

Description

Default

15:2 Reserved

Reserved.

100BASE-TX EEE

R/W

1: Advertise that the 100BASE-TX has EEE capability.

0: Do not advertise that the 100BASE-TX has EEE capabil-

ity.

Reserved

Reserved.

TABLE 6-60:

EEE ADVERTISEMENT, ADDRESS 7.61

Bit

Name

Access

Description

15:2 Reserved

Reserved.

100BASE-TX EEE

1: Link partner is advertising EEE capability for 100BASE-TX.

0: Link partner is not advertising EEE capability for 100BASE-TX.

Reserved

Reserved.

TABLE 6-61:

802.3BF REGISTERS

Name

Function

1.1800

PMA/PMD Time Sync capable

1: PMA/PMD Time Sync Tx capable.

0: PMA/PMD Time Sync Rx capable.

1.1801

PMA/PMD delay Tx max

Tx maximum delay through PHY (PMA/PMD/PCS).

1.1803

PMA/PMD delay Tx min

Tx minimum delay through PHY (PMA/PMD/PCS).

1.1805

PMA/PMD delay Rx max

Rx maximum delay through PHY (PMA/PMD/PCS).

1.1807

PMA/PMD delay Rx min

Rx minimum delay through PHY (PMA/PMD/PCS).

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