VSC8540RT datasheet(35/87 Pages) MICROCHIP

35 / 87 page

 2022 Microchip Technology Inc. and its subsidiaries

DS60001603E-page 35

VSC8540RT

When using the connector loopback testing feature, the device auto-negotiation, speed, and duplex configuration is set

using device registers 0 and 4.

5.17.5

VERIPHY CABLE DIAGNOSTICS

The VSC8540RT device includes a comprehensive suite of cable diagnostic functions that are available using SMI

reads and writes. These functions enable a variety of cable operating conditions and status to be accessed and

checked. The VeriPHY suite has the ability to identify the cable length and operating conditions and to isolate a variety

of common faults that can occur on Cat5 twisted pair cabling.

For functional details of the VeriPHY suite and the operating instructions, see the ENT-AN0125 PHY, Integrated PHY-

Switch VeriPHY - Cable Diagnostics application note.

5.18

Configuration

The VSC8540RT device can be configured by setting internal memory registers using the management interface or by

using the unmanaged mode as described in Section 5.3.3, "Unmanaged Mode".

5.18.1

MANAGED APPLICATIONS

To configure the device using the management interface, perform the following steps.

COMA_MODE active, drive high (optional).

Apply power.

Apply RefClk.

Release reset, drive high. Power and clock must be high before releasing reset.

Wait 15 ms minimum.

Apply patch from PHY_API if available (required for production release, optional for board testing).

Configure register 23 for MAC interface mode.

- Read register 23 (to access register 23, register 31 must be 0).

- Set bits 12:11, MAC configuration, as follows:

00: MII

10: RGMII

01: RMII

- Write new register 23.

Software reset.

- Read register 0 (to access register 0, register 31 must be 0).

- Set bit 15 to 1.

- Write new register 0.

Read register 0 until bit 15 equals to 0.

10. For RGMII mode: configure register 20E2 (to access register 20E2, register 31 must be set to 2). Set bit 11 to 0

and set RX_CLK delay and TX_CLK delay accordingly through bit [6:4] and/or bit [2:0] respectively.

11. Release the COMA_MODE pin, drive low (only necessary if COMA_MODE pin is driven high or unconnected).

5.18.2

UNMANAGED APPLICATIONS

To configure the device using unmanaged mode, perform the following steps.

Apply power.

Apply RefClk.

Release reset, drive high. Power and clock must be high before releasing reset.

Wait 15 ms minimum.

(Optional) For applications that gain register access to the device using the management interface, steps 6–10

can then be performed in order to modify default settings.

5.18.3

INITIALIZATION

The COMA_MODE pin provides an optional feature that may be used to control when the PHYs become active. The

typical usage is to keep the PHYs from becoming active before they have been fully initialized. For more information,

see Section 5.18, "Configuration". Alternatively, the COMA_MODE pin may be connected low (ground) and the PHYs

will be fully active once out of reset.

VSC8540RT Folha de dados(PDF) 35 Page - Microchip Technology

VSC8540RT Folha de dados(HTML) 35 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87

Folha de dados Download

Ligação URL