ADP2442

Data Sheet

Rev. B | Page 6 of 36

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

Figure 3. Pin Configuration, Top View

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

FB

Feedback. The FB regulation voltage is 0.6 V. Connect this pin to a resistor divider from the output of the dc-to-dc

regulator.

2

COMP

Error Amplifier Compensation. Connect a resistor and a capacitor in series to ground.

3

EN

Precision Enable. This features offers ±5% accuracy when using a 1.25 V reference voltage. Pull this pin high to

enable the regulator and pull it low to disable the regulator. Do not leave this pin floating.

4

PGOOD

Active High Power Good Output. This pin pulls low when the output is out of regulation.

5

FREQ

Switching Frequency. A resistor to AGND sets the switching frequency (see the Setting the Switching Frequency

section). Do not leave this pin floating.

6

SYNC/MODE

External Clock Synchronization/Mode Pin. This pin can be used for external frequency synchronization and for

setting forced fixed frequency mode or pulse skip mode. SYNC/MODE accepts an external clock signal, and when

pulled high to 5 V, it sets the mode as forced fixed frequency mode. When this pin is tied to AGND, pulse skip

mode enables. Do not leave the SYNC/MODE pin floating.

7

PGND

Power Ground. Connect a decoupling ceramic capacitor as close as possible between the VIN pin and PGND.

Connect this pin directly to the exposed pad.

8

SW

Switch. The midpoint for the drain of the low-side N-channel power MOSFET switch and the source for the high-

side N-channel power MOSFET switch.

9

VIN

Power Supply Input. Connect this pin to the input power source, and connect a bypass ceramic capacitor directly

from this pin to PGND, as close as possible to the IC. The operation voltage is 4.5 V to 36 V.

10

BST

Boost. Connect a 10 nF ceramic capacitor between the BST and SW pins as close to the IC as possible to form a

floating supply for the high-side N-channel power MOSFET driver. This capacitor is required to drive the gate of

the N-channel power MOSFET above the supply voltage.

11

VCC

Output of the Internal Low Dropout Regulator. This pin supplies power for the internal controller and driver

circuitry. Connect a 1 µF ceramic capacitor between VCC and AGND and a 1 µF ceramic capacitor between VCC

and PGND. The VCC output is active when the EN pin voltage is more than 0.7 V.

12

AGND

Analog Ground. This pin is the internal ground for the control functions. Connect this pin to the exposed pad.

EP

Exposed Pad. Connect the exposed pad to the system AGND plane and PGND plane.

FB

COMP

EN

VIN

SW

PGND

9

8

7

1

2

3

TOP

VIEW

ADP2442

NOTES

1. THE EXPOSED PAD SHOULD BE CONNECTED

TO THE SYSTEM AGND PLANE AND PGND PLANE.