SI5350B datasheet(6/24 Pages) SILABS

6 / 24 page

Si5350B

Rev. 0.9

Table 5. Output Characteristics

(VDD = 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max

Units

Frequency Range

FCLK

0.008

—

160

MHz

Load Capacitance

FCLK < 100 MHz

—

Duty Cycle

Measured at VDD/2

Rise/Fall Time

tr/tf

20% - 80%, CL = 5 pF

0.5

1.5

Output High Voltage

VOH

VDD – 0.6

—

Output Low Voltage

VOL

—

0.6

Period Jitter

JPER

Measured over 10k cycles

—

100

ps pk-pk

Period Jitter, VCXO

JPER_VCXO

—

110

ps pk-pk

Cycle-to-Cycle Jitter

JCC

Measured over 10k cycles

—50

ps pk

Cycle-to-Cycle Jitter,

VCXO

JCC_VCXO

—

ps pk

RMS Phase Jitter

JRMS

12 kHz–20 MHz

—3.5

RMS Phase Jitter

JRMS_VCXO

—

8.5

18.5

ps rms

Table 6. 25 MHz Crystal Requirements1,2

Parameter

Symbol

Min

Typ

Max

Unit

Crystal Frequency

fXTAL

—25—

MHz

Load Capacitance

6—

Equivalent Series Resistance

rESR

——

150



Crystal Max Drive Level

——

100

µW

Notes:

1. Crystals which require load capacitances of 6, 8, or 10 pF should use the device’s internal load capacitance for

optimum performance. See register 183 bits 7:6. A crystal with a 12 pF load capacitance requirement should use a

combination of the internal 10 pF load capacitors in addition to external 2 pF load capacitors. Adding external 2 pF load

capacitors can minimize jitter by 20%.

2. Refer to “AN551: Crystal Selection Guide” for more details.

SI5350B Folha de dados(PDF) 6 Page - Silicon Laboratories

SI5350B Folha de dados(HTML) 6 Page - Silicon Laboratories

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Folha de dados Download

Ligação URL