+

VOUT

R1

Vcc

Current-limiting resistor

required if input voltage

exceeds supply rails by

• 0.3 V.

10 mA max

11

LPV821

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Feature Description (continued)

8.3.2 Input

The LPV821 input common-mode voltage range extends to the supply rails. Typically, the input bias current is

approximately 7 pA; however, input voltages that exceed the power supplies can cause excessive current to flow

into or out of the input pins. Momentary voltages greater than the power supply can be tolerated if the input

current is limited to 10 mA. This limitation is easily accomplished with adding a resistor in series with the input,

as shown in Figure 23.

Figure 23. Input Current Protection

8.3.3 Internal Offset Correction

The LPV821 operational amplifier combines an auto-calibration technique with a time-continuous 8-kHz

operational amplifier in the signal path. The amplifier is zero-corrected every 1 ms using a proprietary technique.

This design has no aliasing or flicker (1/f) noise.

8.4 Device Functional Modes

The LPV821 has a single functional mode. The device is powered on as long as the power supply voltage is

between 1.7 V (±0.85 V) and 3.6 V (±1.8 V).

8.4.1 EMI Performance and Input Filtering

Operational amplifiers vary in susceptibility to EMI. If conducted EMI enters the operational amplifier, the dc

offset at the amplifier output can shift from its nominal value when EMI is present. This shift is a result of signal

rectification associated with the internal semiconductor junctions. Although all operational amplifier pin functions

can be affected by EMI, the input pins are likely to be the most susceptible. The LPV821 operational amplifier

incorporates an internal input low-pass filter that reduces the amplifier response to EMI. Both common mode and

differential-mode filtering are provided by the input filter.

8.4.2 Driving Capacitive Load

The LPV821 is internally compensated for stable unity-gain operation, with a 8-kHz typical gain bandwidth.

However, the unity-gain follower is the most sensitive configuration-to-capacitive load. The combination of a

capacitive load placed directly on the output of an amplifier along with the output impedance of the amplifier

creates a phase lag, which reduces the phase margin of the amplifier. If the phase margin is significantly

reduced, the response is under-damped, which causes peaking in the transfer and, when there is too much

peaking, the op amp might start oscillating.

desired. Values ranging from 5 kΩ to 100 kΩ are usually sufficient to ensure stability. By using the isolation

current drive.