LQFP176 datasheet(84/133 Pages) STMICROELECTRONICS

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Electrical characteristics

SPC560B54x/6x

84/133

DocID15131 Rev 9

4.10

Flash memory electrical characteristics

4.10.1

Program/erase characteristics

Table 29 shows the program and erase characteristics.

Data Flash Power Down. Code Flash in Low Power. SIRC 128 kHz and FIRC 16 MHz on. 10 MHz XTAL clock. FlexCAN:

instances: 0, 1, 2 ON (clocked but not reception or transmission), instances: 4, 5, 6 clocks gated. LINFlex: instances: 0, 1,

2 ON (clocked but not reception or transmission), instance: 3 to 9 clocks gated. eMIOS: instance: 0 ON (16 channels on

PA[0]–PA[11] and PC[12]–PC[15]) with PWM 20 kHz, instance: 1 clock gated. DSPI: instance: 0 (clocked but no

communication), instance: 1 to 5 clocks gated. RTC/API ON. PIT ON. STM ON. ADC1 OFF. ADC0 ON but no conversion

except two analog watchdogs.

Only for the “P” classification: No clock, FIRC 16 MHz off, SIRC 128 kHz on, PLL off, HPVreg off, ULPVreg/LPVreg on. All

possible peripherals off and clock gated. Flash in power down mode.

When going from RUN to STOP mode and the core consumption is > 6 mA, it is normal operation for the main regulator

module to be kept on by the on-chip current monitoring circuit. This is most likely to occur with junction temperatures

exceeding 125 °C and under these circumstances, it is possible for the current to initially exceed the maximum STOP

specification by up to 2 mA. After entering stop, the application junction temperature will reduce to the ambient level and

the main regulator will be automatically switched off when the load current is below 6 mA.

Only for the “P” classification: ULPreg on, HP/LPVreg off, 32 KB RAM on, device configured for minimum consumption, all

possible modules switched off.

10. ULPreg on, HP/LPVreg off, 8 KB RAM on, device configured for minimum consumption, all possible modules switched off.

Table 29. Program and erase specifications

Symbol

Parameter

Conditions

Value

Unit

Min

Typ

(1)

Initial

max

(2)

Max

(3)

tdwprogram

Double word (64 bits) program time(4)

Code Flash

—

500

µs

Data Flash

t16Kpperase

16 KB block preprogram and erase time

Code Flash

—

200

500

5000

Data Flash

300

t32Kpperase

32 KB block preprogram and erase time

Code Flash

—

300

600

5000

Data Flash

400

t128Kpperase

128 KB block preprogram and erase time

Code Flash

—

600

1300

7500

Data Flash

800

tesus

D Erase Suspend Latency

—

µs

tESRT

C Erase Suspend Request Rate(5)

Code Flash

—

Data Flash

—

Typical program and erase times assume nominal supply values and operation at 25 °C. All times are subject to change

pending device characterization.

Initial factory condition: < 100 program/erase cycles, 25 °C, typical supply voltage.

The maximum program and erase times occur after the specified number of program/erase cycles. These maximum values

are characterized but not guaranteed.

Actual hardware programming times. This does not include software overhead.

Time between erase suspend resume and the next erase suspend request.

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