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PS081 Folha de dados(PDF) 89 Page - ams AG

Nome de Peças PS081
Descrição Electrónicos  Single Chip Solution for Strain Gauges
PDF  155 Pages
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Fabricante Electrônico  AMSCO [ams AG]
Página de início  http://www.ams.com
Logo AMSCO - ams AG

PS081 Folha de dados(HTML) 89 Page - ams AG

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acam-messelectronic gmbh - Friedrich-List-Str.4 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
5-2
1
PSØ81
5
Configuration Registers
PSØ81 has 18 configuration registers of 24 Bit width, to be addressed in the RAM from address 48
to 66. The configuration registers control the whole chip including the strain measurement and the
LCD controller. The configuration settings are mirrored in the EEPROM and the configuration is made
by configuring EEPROM bytes 0 to 47 (48 bytes of configuration).
It is possible to write into the configuration registers
• By the internal microprocessor during operation
• Through the SPI interface from an external processor
• During the Power-on reset transferring a basic configuration from the EEPROM
5.1
Overview
Configuration Register RAM address EEPROM bytes
PSØ8 vs. PSØ81 change
Configreg_00
48
2
1
0
no
Configreg_01
49
5
4
3
no
Configreg_02
50
8
7
6
no
Configreg_03
51
11
10
9
no
Configreg_04
52
14
13
12
no
Configreg_05
53
17
16
15
no
Configreg_06
54
20
19
18
no
Configreg_07
55
23
22
21
no
Configreg_08
56
26
25
24
no
Configreg_09
57
29
28
27
no
Configreg_10
58
32
31
30
no
Configreg_11
59
35
34
33
no
Configreg_12
60
38
37
36
no
Configreg_13
61
not mirrored in EEPROM
no
Configreg_14
62
not mirrored in EEPROM
no
Configreg_15
63
not mirrored in EEPROM
no
Configreg_16
64
41
40
39
YES
Configreg_17
65
44
43
42
NEW
Configreg_18
66
47
46
45
NEW
Internal microprocessor:
Configuration of registers is done in EEPROM and then mirrored to RAM. LCD segements are not
configured in the EEPROM but written directly to the RAM address 61-63.
External microprocessor:
Don’t use the EEPROM. Configure directly in the RAM addresses and set the paranetrs epr_pwr_cfg,
epr_pwr_prg and epr_usr_prg to 0 (Configreg_01, Bits[2:0]).
Table 5.1 Overview of configuration registers
Member of the ams Group



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