RM0312 datasheet(61/275 Pages) STMICROELECTRONICS

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RM0312

Clock control (CLK)

The clock controller is designed to be very robust and at the same time easy to use. Its

purpose is to obtain the best performance in the application while at the same time get the

full benefit of all the microcontroller power saving capabilities.

You can manage the clock distribution to the CPU and to the various peripherals, in order to

optimize the power consumption.

A safe and glitch-free switch mechanism allows you to switch the master clock division

factor on the fly, by means of clock prescaler.

Figure 12. Clock structure

HSI RC

16 MHz

LSI RC

38 kHz

fMASTER

fLSI

HSIDIV[1:0]

to Timers

Peripheral clock

& Independent watchdog (IWDG)

USART

I2C

SPI

AWU

LSI = Low Speed Internal clock signal

HSI = High Speed Internal clock signal

Legend:

CCO

Configurable clock output

CCOSEL[2:0]

Enable (8 bits)

to Auto-Wakeup unit (AWU),

fHSI

to CPU

Divider

fHSI/2

to SWIM

Single wire interface module (SWIM)

WWDG

PXS

fMASTER

fMASTER/2

fMASTER/4

fMASTER/16

fHSI_PXS

fHSI_PXS/2

fHSI_PXS/4

fHSI_PXS/16

HSI_PXS

to analog PXS system

16 MHz

fHSI_PXS

HSI_PXS = High Speed Internal clock signal dedicated to analog ProxSense system

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