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AN557 Folha de dados(PDF) 20 Page - STMicroelectronics |
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AN557 Folha de dados(HTML) 20 Page - STMicroelectronics |
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20 / 52 page ![]() AN557 APPLICATION NOTE 20/52 The 40KHz internal oscillator is synchronized with the principal one. If the system work with a oscillator tracks the principal oscillator frequency. In this way the switching frequency will not increase in overload situation. A particular care has to be taken in the inductor value in order to avoid problems during overload or short circuit conditions. A critical situation is present with high switching frequency, (more than 200KHz) where a small inductor value is used and with high capacitive load. In order to return in nominal condition after a short circuit the inductor ripple at 40KHz with the nominal output voltage and current has to be lower than the current limitation value. Example Let us consider L4970A, 10A. (the same approach can be used for all the family). The inductor ripple current is given by the following formula: where fsw = 40KHz ±10% In order to get the maximum inductor ripple current, the previous formula becomes: The current limitation for L4970A will start to work at 13A. therefore: where Ionom = 10A for L4970A. POWER FAIL-RESET CIRCUIT The L4970A include a voltage sensing circuit that may be used to generate a power on power off reset signal for a microprocessor system. The circuit senses the input supply voltage and the output generated voltage and will generate the required reset signal only when both the sensed voltages have reached the required value for correct system operation. The Reset signal is generated after a delay time programma- ble by an external capacitor on the delay pin. Fig 25 shows the circuit implementation of Reset circuit. The supply voltage is sensed on an external pin, for programmability of the threshold, by a first comparator. The second comparator has the reference threshold set at slightly less the ref. voltage for the regulation circuit and the other input connected internally at the feedback point on the regulated voltage. When both the supply voltage and the regulated voltage are in the correct range, transistor Q1 turns off and allows the current generator to charge the delay capacitor discharges completely before initialization of a new Reset cycle. The output gate assures immediate take of reset signal without waiting for complete dis- charge of delay capacitor. Reset output is an open collector transistor capable of sinking 20mA at 200mV voltage. Fig 26 shows reset waveforms. I L ∆ V i V o – () V o ⋅ V i fsw L ⋅ ⋅ ---------------------------------- = I L ∆ V ima x V om ax – () V omax ⋅ V im a x fsw m in L ⋅⋅ ----------------------------------------------------------------- = I lim min I ono m I L ∆ 2 -------- + > |
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