AN3095 datasheet(46/55 Pages) STMICROELECTRONICS

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Experimental results

AN3095

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Doc ID 16555 Rev 3

grid angle. The required software and hardware operations of the PLL have been performed

with the same microcontroller used for the main digital control. The experimental results may

be seen in Figure 29 and 30, where the grid angle (in yellow) is drawn together with the

voltage component on the d axis (green track) of the synchronous reference frame, which is

controlled to zero. Figure 31 shows the synchronization between the estimated angle and

the two voltages on the stationary reference frame, namely, the grid voltage (red track) and

the 90° phase-shifted voltage (blue track), [see References 19, 20].

Figure 31.

Grid angle (yellow), grid voltage (red), 90° phase-shifted voltage (blue)

The phase-shift modulation (Figure 32) for the DC-DC stage is also implemented in the

digital control loop. The STM32F103xx microcontroller allows a high resolution phase shift

(16 ns), thanks to 16-bit timers, with a consequent advantage in terms of output voltage

regulation of the DC-DC converter. In Figure 33, the driving signals of M1 and M6 are

drawn, together with the HF transformer current in CCM and the M1 drain current under

ZVS operation. Commutation of the device M1 may be seen in Figure 34, where the control

signal is shown together with the drain source voltage and drain current at 200 V and 5 A

input. Figure 35 shows phase-shift and control signals (Ch1, Ch2), transformer primary

voltage (Ch3), and secondary voltage (Ch4).

Figure 29.

Grid angle and Vd component

Figure 30.

Grid angle and grid voltage

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