376 datasheet(59/95 Pages) INTEL

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376 EMBEDDED PROCESSOR

SOFTWARE TESTING FOR COPROCESSOR

PRESENCE

When

software

used

test

coprocessor

(80387SX) presence it should use only the following

coprocessor

opcodes

FNINIT

FNSTCW

and

FNSTSW To use other coprocessor opcodes when

a coprocessor is known to be not present first set

EM e 1 in the 80376 CR0 register

50 PACKAGE THERMAL

SPECIFICATIONS

The Intel 80376 embedded processor is specified

for operation when case temperature is within the

range of 0 C – 115 C for both the ceramic 88-pin

PGA package and the plastic 100-pin PQFP pack-

age The case temperature may be measured in any

environment to determine whether the 80376 is

within specified operating range The case tempera-

ture should be measured at the center of the top

surface

The ambient temperature is guaranteed as long as

Tc is not violated The ambient temperature can be

calculated from the ijc and ija from the following

equations

TJ e Tc a P ijc

TA e Tj b P ija

TC e Ta a P ija b ijc

Values for ija and ijc are given in Table 51 for the

100-lead fine pitch ija is given at various airflows

Table 52 shows the maximum Ta allowable (without

exceeding Tc) at various airflows Note that Ta can

be improved further by attaching ‘‘fins’’ or a ‘‘heat

sink’’ to the package P is calculated using the maxi-

mum cold Icc of 305 mA and the maximum VCC of

55V for both packages

Table 51 80376 Package Thermal

Characteristics Thermal Resistances

( CWatt) ijc and ija

ija Versus Airflow-ftmin (msec)

Package ijc

200

400

600

800

1000

(0) (101) (203) (304) (406) (507)

100-Lead 75 345 295

255

225

215

210

Fine Pitch

88-Pin

25 290 225

170

145

125

120

PGA

Table 52 80376

Maximum Allowable Ambient

Temperature at Various Airflows

TA( C) vs Airflow-ftmin (msec)

Package ijc 0

200

400

600

800

1000

(0) (101) (203) (304) (406) (507)

100-Lead 75 70

Fine Pitch

88-Pin

25 70

PGA

60 ELECTRICAL SPECIFICATIONS

The following sections describe recommended elec-

trical connections for the 80376 and its electrical

specifications

61 Power and Grounding

The 80376 is implemented in CHMOS IV technology

and has modest power requirements However its

high clock frequency and 47 output buffers (address

data control and HLDA) can cause power surges

as multiple output buffers drive new signal levels

simultaneously For clean on-chip power distribution

at high frequency 14 VCC and 18 VSS pins separate-

ly feed functional units of the 80376

Power and ground connections must be made to all

external VCC and GND pins of the 80376 On the

circuit board all VCC pins should be connected on a

VCC plane and all VSS pins should be connected on

a GND plane

POWER DECOUPLING RECOMMENDATIONS

Liberal decoupling capacitors should be placed near

the 80376 The 80376 driving its 24-bit address bus

and 16-bit data bus at high frequencies can cause

transient power surges particularly when driving

large capacitive loads Low inductance capacitors

and interconnects are recommended for best high

frequency electrical performance Inductance can

be reduced by shortening circuit board traces be-

tween the 80376 and decoupling capacitors as

much as possible

RESISTOR RECOMMENDATIONS

The ERROR FLT and BUSY inputs have internal

pull-up resistors of approximately 20 KX and the

PEREQ input has an internal pull-down resistor of

approximately 20 KX built into the 80376 to keep

these signals inactive when the 80387SX is not

present in the system (or temporarily removed from

its socket)

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