DS1616

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of samples since the Sample Rate register was written to a non-0 value). The Total Samples Counter

counts the total number of samples that have been recorded in the life of the device (assuming the lithium

energy source has not been removed during that time). If the end user knows the value in the Total

Samples Counter before the data acquisition operation is started, he can guarantee that the DS1616 has

not been cleared. If the Current Samples count equals the difference between the ending value and

beginning value of the Total Samples Counter, then the DS1616 data has not been cleared during that

time frame.

As a fourth security measure, changing any value in the RTC and Control registers (with the exception of

the Status registers) will stop datalogging and clear the Mission-in-Progress (MIP) bit.

SERIAL INTERFACE

The DS1616 provides two different serial communications options; asynchronous and synchronous. Both

communications options transmit the data LSb First/MSb last.

The mode of communication is selected via the COMSEL pin. When this pin is pulled high, the DS1616

operates in synchronous mode. In this mode, communication with the DS1616 is facilitated by the

selected and communication with the device occurs over the TX and RX pins. The operation of each

mode is discussed in further detail below.

Asynchronous Communication

In asynchronous mode, the DS1616 operates as a slave peripheral device which is read and written over a

half duplex asynchronous data interface at the fixed rate of 9,600 bits per second. Data is received and

transmitted in 8-bit bytes using a standard asynchronous serial communications format as shown in

Figure 3. This format is easily generated by the UART in most systems. The DS1616 data format

implements 10-bit words including 1 start bit, 8 data bits, and 1 stop bit. Data is received by the DS1616

on the RX pin and transmitted by the TX pin.

COMMUNICATION WORD FORMAT Figure 3

Synchronous Communication

Synchronous communication is accomplished over the 3-wire bus which is composed of three signals.

followed by a rising edge. For data inputs, the data must be valid during the rising edge. Data bits are

output on the falling edge of the clock and remain valid through the rising edge.

When reading data from the DS1616, the I/O pin goes to a high impedance state when the clock is high.

D0

D1

D2

D3

D4

D5

D6

D7

START

BIT

DATA

BITS

STOP

BIT