DS1616

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STATUS 2 REGISTER

MSb

LSb

0

ALF1 AHF1

ALF2 AHF2 ALF3 AHF3

0

ALFx - ADC Data Low Flag [1-3] - A logic 1 in the ADC Data Low Flag [1-3] bits indicate that the

ADC Channel [1-3] Data from the corresponding channel is/has been less than or equal to the value in the

low. ALFx is cleared by writing this bit to a logic 0. The Clear Memory command has no affect on this

bit.

AHFx - ADC Data High Flag [1-3] - A logic 1 in the ADC Data High Flag [1-3] bits indicate that the

corresponding ADC Channel [1-3] Data is/has been greater than or equal to the value in the

low. AHFx is cleared by writing this bit to a logic 0. The Clear Memory command has no effect on this

bit.

SILICON SERIAL NUMBER

A unique 64-bit lasered serial number is located in the register bank. This serial number is divided into

three parts. The first byte contains a model number to identify the device type (19h). The next six

registers contain a unique binary number. The last serial number byte contains a CRC byte used to

validate the data in the first seven serial number registers. All 8 bytes of the serial number are read-only

registers.

The DS1616 is manufactured such that no two devices will contain an identical serial number. Blocks of

numbers can be reserved by the customer.

Contact Dallas Semiconductor for special ordering

information for devices with reserved blocks of serial numbers.

SECURITY

The DS1616 provides several measures to insure data integrity for the end user. These security measures

are intended to prevent third party intermediaries from tampering with the data that has been stored in the

Datalog and Histogram memory.

As a first security measure, the Datalog and Histogram memory are read-only from the perspective of the

end user. The DS1616 can write sampled data into these memory banks, but the end user cannot write

data to individual registers. This prevents an unscrupulous intermediary from writing false data to the

DS1616. The end user, however, can clear the contents of the Datalog and Histogram memory. This is

accomplished by enabling and issuing the Clear Memory command.

A second security feature lies in the fact that once the sample rate has been selected by writing to the

Sample Rate register, it cannot be changed to another value without resetting the recorded data. This

prevents gathering many data samples at a fast sample rate and then lowering the sample rate to give the

appearance that the data was recorded over a longer period of time. The Sample Rate register can only be

written to a new value if the MEM CLR bit is set to 1.

A third security feature lies in the two integrated sample counters, the Current Samples Counter and the

Total Samples Counter. These two counters can be used to guarantee that the DS1616 data has not been

cleared at any time during a given period of time. The Current Samples Counter counts the number of

samples that have occurred since the most recent data acquisition operation was started (i.e., the number