AD9430_10 datasheet(21/44 Pages) AD

21 / 44 page

AD9430

Rev. E | Page 21 of 44

–90

–70

–60

–40

–20

–80

–50

–30

–10

SFDR dBc

LVDS MODE

FULL SCALE = 1.5

SFDR dBc

CMOS MODE

FULL SCALE = 1.5

80dB REFERENCE LINE

Figure 42. SFDR vs. AIN Input Level, AIN @ 10.3 MHz, 210 MSPS,

LVDS/CMOS Modes

–90

–70

–60

–40

–20

–80

–50

–30

–10

SFDR dBc

LVDS MODE

FULL SCALE = 1.5

SFDR dBc

LVDS MODE

FULL SCALE = 0.75

80dB REFERENCE LINE

Figure 43. SFDR vs. AIN Input Level, AIN @ 10.3 MHz, 210 MSPS, LVDS Mode,

Full Scale = 0.76 V/1.536 V

MHz

2.65

42.5

21.25

–140

–40

–120

–100

–60

–80

–20

NPR = 56.95dB

ENCODE = 170MSPS

NOTCH @ 19MHz

Figure 44. Noise Power Ratio Plot

MHz

–20

–40

–60

–80

–100

19.2

38.4

19.2

47.6

Figure 45. W-CDMA Four Channels Centered at 38.4 MHz,

fs = 153.6 MHz, LVDS Mode

FULL-SCALE RANGE (V)

2.5

2.0

1.0

1.5

0.5

SINAD

SNR

SFDR

Figure 46. SNR, SINAD, and SFDR vs. Full-Scale Range, S5 = 0,

Full-Scale Range Varied by Adjusting VREF, 170 MSPS

TEMPERATURE (°C)

–40

100

–20

4.5

2.5

4.0

3.5

3.0

TPD

TCPD

Figure 47. Propagation Delay vs. Temperature, LVDS Mode,

170 MSPS/210 MSPS

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