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Advance Data Sheet

DNC3X3125

March 2000

10/100 Mbits/s Ethernet Transceiver Macrocell

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Table 27. MR29—Device-Specific Register 2 (100 Mbits/s Control) Bit Descriptions.............................................28

Table 28. MR30—Device-Specific Register 3 (10 Mbits/s Control) Bit Descriptions...............................................29

Table 29. MR31—Device-Specific Register 4 (Quick Status) Bit Descriptions .......................................................30

Figures

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Figure 1. DNC3X3125 Functional Block Diagram .................................................................................................... 4

Figure 2. I/Os of the DNC3X3125 Macrocell ............................................................................................................ 5

Figure 3. DNC MII Tx Logic ....................................................................................................................................15

Figure 4. DNC MII Rx Logic....................................................................................................................................15

Figure 5. DNC Maintenance Logic .........................................................................................................................15

Figure 6. Pinout Assignment ..................................................................................................................................16

Figure 7. Typical Application ...................................................................................................................................17

Figure 8. Typical Single-Channel Twisted-Pair (TP) Interface.................................................................................18