KM4132G271B datasheet(22/51 Pages) SAMSUNG

Nome de Peças	KM4132G271B

Descrição Electrónicos	128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL

PDF	51 Pages

Scroll/Zoom	100%

Fabricante Electrônico	SAMSUNG [Samsung semiconductor]

Página de início	http://www.samsung.com/Products/Semiconductor

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22 / 51 page

KM4132G271B

CMOS SGRAM

- 22

Rev. 2.4 (May 1998)

Note 3

Auto Precharge Starts

*Note : 1. To inhibit invalid write, DQM should be issued.

2. This precharge command and burst write command should be of the same bank, otherwise it is not precharge

interrupt but only another bank precharge of dual banks operation.

5. Write Interrupted by Precharge & DQM

CLK

CMD

DQM

Masked by DQM

PRE

Note 2

Note 1

*Note : 1. tBPL : Block write data-in to PRE command delay

2. Number of valid output data after Row Precharge : 1, 2 for CAS Latency =2, 3 respectively.

3. The row active command of the precharge bank can be issued after t RP from this point.

The new read/write command of other activated bank can be issued from this point.

At burst read/write with auto precharge, CAS interrupt of the same/another bank is illegal.

6. Precharge

CLK

CMD

PRE

1) Normal Write (BL=4)

tRDL

Note 1

3) Read (BL=4)

CLK

CMD

DQ(CL2)

DQ(CL3)

PRE

Note 2

7. Auto Precharge

CLK

CMD

1) Normal Write (BL=4)

Note 3

Auto Precharge Starts

3) Read (BL=4)

CLK

CMD

DQ(CL2)

DQ(CL3)

Note 3

Auto Precharge Starts

Pixel

CLK

CMD

PRE

2) Block Write

tBPL

Note 1

CLK

CMD

(CL 2, 3)

2) Block Write

Pixel

tBPL

tRP

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