33902 datasheet(18/31 Pages) FREESCALE

18 / 31 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33902

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

Termination

The device supports the two main types of bus

terminations:

• Differential termination resistors between CANH and

CANL lines

• Split termination concept, with the mid point of the differen-

tial termination connected to GND through a capacitor,

and to the SPLIT pin

• Refer to Typical Application and Bus Termination Options

and WAKE Pin Configuration on page 27

Low Power Mode

In low power mode, the CAN is internally supplied from the

VSUP pin.

In low power mode, the CANH and CANL drivers are

disabled, and the receiver is also disabled. CANH and CANL

have a typical 40 k

Ω impedance to GND. The wake-up

receiver can be activated if wake-up is enabled by the P_SPI

command. The SPLIT pin is high-impedance.

When the device is set back into Normal mode, CANH and

CANL are set back into the recessive level. This is illustrated

in the following diagram.

Figure 12. Bus Signal in Normal and Low Power Mode

Wake-up

When the CAN interface is in Sleep mode with wake-up

enabled, the CAN bus traffic is detected. The CAN bus wake-

up signal is a pattern wake-up. CAN wake-up cannot be

disabled.

CAN Wake-up Report

The CAN wake reports depend upon the low power mode

selected, Sleep or Standby. In Sleep mode, the INH pin is

activated. In Standby mode, the VIO voltage is present and

the wake-up is reported by the ERR and RXD pin low level.

Ref to Table 5.

Pattern Wake-up

In order to wake-up the CAN interface, the wake-up

receiver must receive a series of 3 consecutive valid

dominant pulses. This is the default setting in which the CAN

WU-pattern bit is set low. CAN WU-pattern bit can be set high

by P_SPI, and the wake up will occur after a single pulse

duration of a minimum of 4.0

μs.

A valid dominant pulse should be longer than tPWIDTH. The

3 pulses should occur in a time frame of 120

μs to be

considered valid. When 3 pulses pass these criteria the wake

signal is detected. This is illustrated in Figure 13.

Figure 13. Pattern Wake-up

CANL

CANH

TXD

RXD

2.5 V

CANL-DOM

CANH-DOM

CANL/CANH-REC

2.5 V

High ohmic t termination (50kohms) to GND

SPLIT

Dominant state

Recessive state

MC33902: bus driver

MC33902: receiver

(bus dominant set by other IC)

High-impedance

Normal or Listen Only mode

Go to Sleep,

CANH-CANL

Sleep or Standby mode

Incoming CAN Message

CANL

CANH

Internal wake-up signal

min

tPWIDTH

Dominant

Internal differential wake-up

receiver signal

max 120

μs

CAN bus

Pulse # 1

Dominant

Pulse # 2

Dominant

Pulse # 3

Dominant

Pulse # 4

33902 Folha de dados(PDF) 18 Page - Freescale Semiconductor, Inc

33902 Folha de dados(HTML) 18 Page - Freescale Semiconductor, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Folha de dados Download

Ligação URL