LTC1291BCN8 datasheet(3/20 Pages) LINER

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LTC1291

1291fa

AC CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

VIH

High Level Input Voltage

VCC = 5.25V

2.0

VIL

Low Level Input Voltage

VCC = 4.75V

0.8

IIH

High Level Input Current

VIN = VCC

2.5

µA

IIL

Low Level Input Current

VIN = 0V

–2.5

µA

VOH

High Level Output Voltage

VCC = 4.75V, IOUT = –10

µA

4.7

VCC = 4.75V, IOUT = – 360

µA

2.4

4.0

VOL

Low Level Output Voltage

VCC = 4.75V, IOUT = 1.6mA

0.4

IOZ

High Z Output Leakage

VOUT = VCC, CS High

µA

VOUT = 0V, CS High

–3

µA

ISOURCE

Output Source Current

VOUT = 0V

– 20

ISINK

Output Sink Current

VOUT = VCC

ICC

Positive Supply Current

CS High

612

CS High Power Shutdown CLK Off

510

µA

LTC1291B/LTC1291C/LTC1291D

ELECTRICAL C

HARA TER STICS

DIGITAL A D

Note 7: Two on-chip diodes are tied to each analog input which will

conduct for analog voltages one diode drop below GND or one diode drop

above VCC. Be careful during testing at low VCC levels (4.5V), as high level

analog inputs (5V) can cause this input diode to conduct, especially at

elevated temperature, and cause errors for inputs near full scale. This spec

allows 50mV forward bias of either diode. This means that as long as the

analog input does not exceed the supply voltage by more than 50mV, the

output code will be correct.

Note 8: Channel leakage current is measured after the channel selection.

Note 9: Increased leakage currents at elevated temperatures cause the

S/H to droop, therefore it is recommended that fCLK

≥ 125kHz at 125°C,

fCLK

≥ 30kHz at 85°C and fCLK ≥ 3kHz at 25°C.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: All voltage values are with respect to ground (unless otherwise

noted).

Note 3: VCC = 5V, CLK = 1.0MHz unless otherwise specified.

Note 4: One LSB is equal to VCC divided by 4096. For example, when VCC =

5V, 1LSB = 5V/4096 = 1.22mV.

Note 5: Linearity error is specified between the actual end points of the

A/D transfer curve. The deviation is measured from the center of the

quantization band.

Note 6: Recommended operating conditions.

The q denotes the specifications which

apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Note 3)

The q denotes the specifications which apply over the full operating temperature range,

otherwise specifications are at TA = 25°C. (Note 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

tdis

Delay Time, CS

↑ to DOUT Hi-Z

See Test Circuits

150

ten

Delay Time, CLK

↓ to DOUT Enabled

See Test Circuits

200

thDI

Hold Time, DIN after CLK

↑

VCC = 5V (Note 6)

thDO

Time Output Data Remains Valid after CLK

↓

130

tWHCLK

CLK High Time

VCC = 5V (Note 6)

300

tWLCLK

CLK Low Time

VCC = 5V (Note 6)

400

DOUT Fall Time

See Test Circuits

130

DOUT Rise Time

See Test Circuits

tsuDI

Setup Time, DIN Stable before CLK

↑

VCC = 5V (Note 6)

tsuCS

Setup Time, CS

↓ before CLK↑

VCC = 5V (Note 6)

tWHCS

CS High Time During Conversion

VCC = 5V (Note 6)

500

tWLCS

CS Low Time During Data Transfer

VCC = 5V (Note 6)

CLK Cycles

CIN

Input Capacitance

Analog Inputs On Channel

100

Analog Inputs Off Channel

Digital Inputs

LTC1291B/LTC1291C/LTC1291D

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