H8SLASH3021 datasheet(8/712 Pages) RENESAS

8 / 712 page

Rev.2.00 Mar. 22, 2007 Page viii of xxiv

REJ09B0352-0200

Item

Page

Revision (See Manual for Details)

7.5.3 Pin Functions in

Each Mode

Figure 7.13 Pin

Functions in Modes 1

and 3 (Port 5)

149

Figure amended

Port 5

(output)

8.4.8 Buffering

Figure 8.52 Input

Capture and Buffer

Transfer Timing

(Example)

263

Figure amended

TCNT

TIOC pin

Input capture

signal

n + 1

N + 1

8.4.9 ITU Output

Timing

Figure 8.55 Timing of

Disabling of ITU Output

by External Trigger

(Example)

266

Figure amended

TIOCA1 pin

TOER

ITU output

I/O port

ITU output

I/O port

Generic

input/output

Generic

input/output

ITU output

Input capture

signal

ITU output

pins

H'C0

N: Arbitrary setting (H'C1 to H'FF)

9.2.5 Next Data

293

Bit table amended

Bit

Initial value

Read/Write

NDR7

R/W

NDR6

R/W

NDR5

R/W

NDR4

R/W

NDR3

R/W

NDR2

R/W

NDR1

R/W

NDR0

R/W

Next data 7 to 4

These bits store the next output

data for TPC output group 1

Next data 3 to 0

These bits store the next output

data for TPC output group 0

9.4.2 Note on Non-

Overlapping Output

313

Description amended

This can be accomplished by having the IMFA interrupt

service routine write the next data in NDR.

The next data

must be written before the next compare match B occurs.

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