H8SLASH3021 datasheet(64/712 Pages) RENESAS

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2. CPU

Rev.2.00 Mar. 22, 2007 Page 40 of 684

REJ09B0352-0200

2.6.5

Notes on Use of Bit Manipulation Instructions

The BSET, BCLR, BNOT, BST, and BIST instructions read a byte of data, modify a bit in the

byte, then write the byte back. Care is required when these instructions are used to access registers

with write-only bits, or to access ports.

Step

Description

Read

Read one data byte at the specified address

Modify

Modify one bit in the data byte

Write

Write the modified data byte back to the specified address

Example 1: BCLR is executed to clear bit 0 in the port A data direction register (PADDR) under

the following conditions.

PA7, PA6:

Input pins

PA5 – PA0:

Output pins

The intended purpose of this BCLR instruction is to switch PA0 from output to input.

Before Execution of BCLR Instruction

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Input/output

Input

Output

DDR

Execution of BCLR Instruction

BCLR

#0, @PADDR

;Clear bit 0 in data direction register

After Execution of BCLR Instruction

PA7

PA6

PA5

PA4

PA3

PA2

PA1

PA0

Input/output

Output

Input

DDR

Explanation: To execute the BCLR instruction, the CPU begins by reading PADDR. Since

PADDR is a write-only register, it is read as H'FF, even though its true value is H'3F.

Next the CPU clears bit 0 of the read data, changing the value to H'FE.

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