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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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HD64F2149YV Folha de dados(PDF) 302 Page - Renesas Technology Corp |
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HD64F2149YV Folha de dados(HTML) 302 Page - Renesas Technology Corp |
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302 / 1075 page  Section 8 I/O Ports Rev. 3.00 Jan 18, 2006 page 274 of 1044 REJ09B0280-0300 PEDDR and PFDDR are initialized to H'00 by a reset and in hardware standby mode. They retain their prior states in software standby mode. Port E and port F Output Data Registers (PEODR, PFODR) Bit 7 6543 210 PE7ODR PE6ODR PE5ODR PE4ODR PE3ODR PE2ODR PE1ODR PE0ODR Initial value 0 0000 000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Bit 7 6543 210 PF7ODR PF6ODR PF5ODR PF4ODR PF3ODR PF2ODR PF1ODR PF0ODR Initial value 0 0000 000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W PEODR and PFODR are 8-bit read/write registers that store output data for the pins on ports E and F (PE7 to PE0 and PF7 to PF0). PEODR and PFODR can always be read from or written to, regardless of the PEDDR and PFDDR settings. PEODR and PFODR are initialized to H'00 by a reset and in hardware standby mode. They retain their prior states in software standby mode. Port E and port F Input Data Registers (PEPIN, PFPIN) Bit 7 6543 210 PE7PIN PE6PIN PE5PIN PE4PIN PE3PIN PE2PIN PE1PIN PE0PIN Initial value —* —* —* —* —* —* —* —* Read/Write R RRRR RRR Note: * Determined by the state of pins PE7 to PE0. Bit 7 6543 210 PF7PIN PF6PIN PF5PIN PF4PIN PF3PIN PF2PIN PF1PIN PF0PIN Initial value —* —* —* —* —* —* —* —* Read/Write R RRRR RRR Note: * Determined by the state of pins PF7 to PF0. Reading PEPIN and PFPIN always returns the pin states. |
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