HD64F2149YV datasheet(992/1075 Pages) RENESAS

Nome de Peças	HD64F2149YV

Descrição Electrónicos	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

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Appendix B Internal I/O Registers

Rev. 3.00 Jan 18, 2006 page 964 of 1044

REJ09B0280-0300

BCR—Bus Control Register

H'FFC6

Bus Controller

ICIS1

R/W

ICIS0

R/W

BRSTRM

R/W

BRSTS1

R/W

BRSTS0

R/W

IOS0

R/W

IOS1

R/W

Bit

Initial value

Read/Write

IOS select

IOS1

Address for which

AS/IOS pin

output goes low when IOSE = 1

Low in access to address

H'(FF)F000 to H'(FF)F03F

IOS0

Low in access to address

H'(FF)F000 to H'(FF)F0FF

Low in access to address

H'(FF)F000 to H'(FF)F3FF

Low in access to address

H'(FF)F000 to H'(FF)F7FF

Burst cycle select 0

Max. 4 words in burst access

Max. 8 words in burst access

Burst cycle select 1

Burst cycle comprises 1 state

Burst cycle comprises 2 states

Burst ROM enable

Basic bus interface

Burst ROM interface

Idle cycle insert 0

Idle cycle not inserted in case of successive

external read and external write cycles

Idle cycle inserted in case of successive

external read and external write cycles

Reserved bit

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