HD64F2149YV datasheet(500/1075 Pages) RENESAS

500 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 472 of 1044

REJ09B0280-0300

Yes

<End>

[1]

Initialization

Start reception

Yes

[4]

Clear RE bit in SCR to 0

Error handling

(Continued on

next page)

[5]

Yes

FER

∨ ORER = 1?

RDRF = 1?

All data received?

Read MPIE bit in SCR

[2]

Read ORER and FER flags in SSR

Read RDRF flag in SSR

[3]

Read receive data in RDR

Yes

This station's ID?

Read ORER and FER flags in SSR

Yes

Read RDRF flag in SSR

Yes

FER

∨ ORER = 1?

Read receive data in RDR

RDRF = 1?

SCI initialization:

The RxD pin is automatically

designated as the receive data

input pin.

ID reception cycle:

Set the MPIE bit in SCR to 1.

SCI status check, ID reception

and comparison:

Read SSR and check that the

RDRF flag is set to 1, then read

the receive data in RDR and

compare it with this station’s ID.

If the data is not this station’s ID,

set the MPIE bit to 1 again, and

clear the RDRF flag to 0.

If the data is this station’s ID,

clear the RDRF flag to 0.

SCI status check and data

reception:

Read SSR and check that the

RDRF flag is set to 1, then read

the data in RDR.

Receive error handling and break

detection:

If a receive error occurs, read the

ORER and FER flags in SSR to

identify the error. After

performing the appropriate error

handling, ensure that the ORER

and FER flags are both cleared

to 0.

Reception cannot be resumed if

either of these flags is set to 1.

In the case of a framing error, a

break can be detected by reading

the RxD pin value.

[1]

[2]

[3]

[4]

[5]

Figure 15.12 Sample Multiprocessor Serial Reception Flowchart

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