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Os motores de busca de Datasheet de Componentes eletrônicos |
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Os motores de busca de Datasheet de Componentes eletrônicos |
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ST7263B Folha de dados(PDF) 24 Page - STMicroelectronics |
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ST7263B Folha de dados(HTML) 24 Page - STMicroelectronics |
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24 / 132 page  ST7263B 24/132 POWER SAVING MODES (Cont’d) 8.3 SLOW Mode In Slow mode, the oscillator frequency can be di- vided by 2 as selected by the SMS bit in the Mis- cellaneous Register. The CPU and peripherals are clocked at this lower frequency. Slow mode is used to reduce power consumption, and enables the user to adapt the clock frequency to the avail- able supply voltage. 8.4 WAIT Mode WAIT mode places the MCU in a low power con- sumption mode by stopping the CPU. This power saving mode is selected by calling the “WFI” ST7 software instruction. All peripherals remain active. During WAIT mode, the I bit of the CC register is forced to 0 to enable all interrupts. All other registers and memory re- main unchanged. The MCU remains in WAIT mode until an interrupt or Reset occurs, whereup- on the Program Counter branches to the starting address of the interrupt or Reset service routine. The MCU will remain in WAIT mode until a Reset or an Interrupt occurs, causing it to wake up. Refer to Figure 18. Figure 18. WAIT Mode Flow Chart WFI INSTRUCTION RESET INTERRUPT Y N N Y CPU CLOCK OSCILLATOR PERIPH. CLOCK I-BIT ON ON CLEARED OFF CPU CLOCK OSCILLATOR PERIPH. CLOCK I-BIT ON ON SET ON FETCH RESET VECTOR OR SERVICE INTERRUPT 4096 CPU CLOCK CYCLES DELAY IF RESET Note: Before servicing an interrupt, the CC register is pushed on the stack. The I-Bit is set during the inter- rupt routine and cleared when the CC register is popped. |
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