M50FW016N1T datasheet(6/45 Pages) STMICROELECTRONICS

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M50FW016

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SUMMARY DESCRIPTION

The M50FW016 is a 16 Mbit (2Mb x8) non-volatile

memory

that

can

read,

erased

and

reprogrammed.

These

operations

can

performed using a single low voltage (3.0 to 3.6V)

supply. For fast programming and fast erasing, an

optional 12V power supply can be used to reduce

the programming and the erasing times.

The memory is divided into blocks that can be

erased independently so it is possible to preserve

valid data while old data is erased. Blocks can be

protected

individually

prevent

accidental

Program or Erase commands from modifying the

memory. Program and Erase commands are

written to the Command Interface of the memory.

An on-chip Program/Erase Controller simplifies

the process of programming or erasing the

memory by taking care of all of the special

operations that are required to update the memory

contents. The end of a program or erase operation

can

detected

and

any

error conditions

identified. The command set required to control

the memory is consistent with JEDEC standards.

Two different bus interfaces are supported by the

memory. The primary interface, the Firmware Hub

(or FWH) Interface, uses Intel’s proprietary FWH

protocol. This has been designed to remove the

need for the ISA bus in current PC Chipsets; the

M50FW016 acts as the PC BIOS on the Low Pin

Count bus for these PC Chipsets.

The secondary interface, the Address/Address

Multiplexed (or A/A Mux) Interface, is designed to

be compatible with current Flash Programmers for

production line programming prior to fitting to a PC

Motherboard.

The memory is offered in TSOP40 (10 x 20mm)

package and it is supplied with all the bits erased

(set to ’1’).

Figure 2. Logic Diagram (FWH Interface)

Table 1. Signal Names (FWH Interface)

AI04462

FWH4

FWH0-

FWH3

VCC

M50FW016

CLK

VSS

TBL

INIT

ID0-ID3

FGPI0-

FGPI4

VPP

FWH0-FWH3

Input/Output Communications

FWH4

Input Communication Frame

ID0-ID3

Identification Inputs

FGPI0-FGPI4

General Purpose Inputs

Interface Configuration

Interface Reset

INIT

CPU Reset

CLK

Clock

TBL

Top Block Lock

Write Protect

RFU

Reserved for Future Use. Leave

disconnected.

VCC

Supply Voltage

VPP

Optional Supply Voltage for Fast

Program and Fast Erase Operations

VSS

Ground

Not Connected Internally

RFU

Reserved for Future Use

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