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S32K310 Folha de dados(PDF) 28 Page - NXP Semiconductors |
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S32K310 Folha de dados(HTML) 28 Page - NXP Semiconductors |
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28 / 164 page ![]() Table 9. HSE firmware memory verification time examples...continued Symbol Description Min Typ Max Unit Condition Spec Number tGMAC_64KB Memory verification of 64 KB of application firmware, using AES-128 GMAC cipher. — 1.3 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tGMAC_1024KB Memory verification of 1024 KB of application firmware, using AES-128 GMAC cipher. — 18.7 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tHMAC_64KB Memory verification of 64 KB of application firmware, using AES-128 HMAC cipher. — 0.7 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tHMAC_1024KB Memory verification of 1024 KB of application firmware, using AES-128 HMAC cipher. — 9.12 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tRSA_64KB Memory verification of 64 KB of application firmware, using RSA 2048 cipher. — 15.4 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tRSA_1024KB Memory verification of 1024 KB of application firmware, using RSA 2048 cipher. — 23.8 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tECDSA_64KB Memory verification of 64 KB of application firmware, using ECDSA 521 bits cipher. — 53.95 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tECDSA_1024KB Memory verification of 1024 KB of application firmware, using ECDSA 521 bits cipher. — 62.34 — ms Device running from PLL (clocking option B). CORE_CLK = 120 MHz; HSE_CLK = 120 MHz. — tSHA2_256_64KB Memory verification of 64 KB of application firmware, — 0.64 — ms Device running from PLL (clocking option B). CORE_CLK = 120 — Table continues on the next page... NXP Semiconductors S32K3XX S32K3xx Data Sheet S32K3XX All information provided in this document is subject to legal disclaimers. © 2025 NXP B.V. All rights reserved. Product data sheet Rev. 13 — 12 November 2025 Document feedback 28 / 164 |
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