CY244/45ZXC
Document #: 38-07748 Rev. **
Page 3 of 9
Frequency Select Pin Operation
Analog VCXO
There are three programmable reference operating modes for
the CY24xZXC family of devices. The first mode utilizes an
external pullable crystal and incorporates an internal Analog
VCXO.
The second mode configures the internal crystal oscillator to
accept an external driven reference source from 1 to 100 MHz.
The input capacitance on the XIN pin when driven in this mode
is typically 15pF.
The third mode disables the VCXO input control and sets the
internal oscillator to a fixed frequency operation. The load
capacitance seen by the external crystal when connected to
pins XIN and XOUT is typically equal to 10pF.
One of the key components to the CY24xZXC family of
devices is the analog VCXO. The VCXO is used to “pull” the
reference crystal higher or lower in order to lock the system
frequency to an external source. This is ideal for applications
where the output frequency needs to track along with an
external reference frequency that is constantly shifting.
The VCXO is completely analog, so there is infinite resolution
on the VCXO pull curve. The Analog to Digital Converter steps
that are normally associated with a digital VCXO input are not
present in this device. A special pullable crystal must be used
in order to have adequate VCXO pull range. Pullable Crystal
specifications are included in this data sheet.
Please contact the local Cypress Field Application Engineer
(FAE) or sales representative for pullable crystal recommen-
dations outside of the standard industry frequencies given in
the Pullable Crystal Specifications.
VCXO Profile
Figure 2 shows an example of what a VCXO profile looks like.
The analog voltage input is on the X-axis and the PPM range
is on the Y-axis. An increase in the VCXO input voltage results
in a corresponding increase in the output frequency. This has
the effect of moving the PPM from a negative to positive offset.
Table 1. CY244ZXC 16-pin TSSOP
Output Signal
Frequency Selection
Lines
CLOCK B & CLOCK C
FS1 FS0
CLOCK A & CLOCK F
FS0
CLOCK G
FIXED
Table 2. CY245ZXC 20-pin TSSOP
Output Signal
Frequency Selection
Lines
CLOCK C
FS2 FS1 FS0
CLOCK B & CLOCK D
FS1 FS0
CLOCK A, CLOCK E, & CLOCK F FS0
CLOCK G
FIXED
FREF
/Q
VC O a nd
O t her
c o m pon ents
/P
F
VCO
Figure 1. Simplified PLL
-200
-150
-100
-50
0
50
100
150
200
0
0.5
1
1.5
2
2.5
3
3.5
VCXO input [V]
Figure 2. VCXO Profile
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